User`s manual

63
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
MITSUBISHI MICROCOMPUTERS
Rev. 1.0
M37281MAH–XXXSP,M37281MFH–XXXSP
M37281MKH–XXXSP,M37281EKSP
8.10.10 Data Clock Generating Circuit
This circuit generates a data clock synchronized with the start bit
detected in the start bit detecting circuit. The data clock stores cap-
tion data to the 16-bit shift register. When the 16-bit data has been
stored and the clock run-in determination circuit determines clock
run-in, the caption data latch completion flag is set. This flag is reset
at a falling of the vertical synchronous signal (Vsep).
Fig. 8.10.11 Data Clock Position Register
b7 b6 b5 b4 b3 b2 b1 b0
Data clock position register (DPS) [Address 00EB
16 ]
Data Clock Position Register
01
R
W
3
Data clock position set
bits (DPS3 to DPS7)
1
R
W
Fix these bits to “1.“
1,2 Fix this bit to “0.“
0
R
W
010
B Function
s
Name
R
W
4
to
7
0
After reset