User`s manual
57
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
MITSUBISHI MICROCOMPUTERS
Rev. 1.0
M37281MAH–XXXSP,M37281MFH–XXXSP
M37281MKH–XXXSP,M37281EKSP
Figures 8.10.4 and 8.10.5 the data slicer control registers.
Fig. 8.10.4 Data Slicer Control Register 1
Fig. 8.10.5 Data Slicer Control Register 2
b7 b6 b5b4 b3 b2b1 b0
Data slicer control register 1(DSC1) [Address 00E0
16]
Data Slicer Control Register 1
00
RW
0RW
2
Reference clock source
selection bit (DSC12)
0: Video signal
1: H
SYNC signal
0R
W
0RW
00
0: Stopped
1: Operating
Data slicer and timing signal
generating circuit control bit (DSC10)
Fix these bits to “0.”
3 to
7
000
10: F2
1: F1
Selection bit of data slice reference
voltage generating field (DSC11)
Definition of fields 1 (F1) and 2 (F2)
H
sep
V
sep
F1:
H
sep
V
sep
F2:
B
After reset
R
W
Name Functions
b7 b6 b5 b4 b3 b2 b1 b0
Data slicer control register 2 (DSC2) [Address 00E1
16
]
Data Slicer Control Register 2
0 Indeterminate
0
Indeterminate
Indeterminate
00
0: Data is not latched yet and a
clock-run-in is not determined.
1: Data is latched and a
clock-run-in is determined.
Caption data latch
completion flag 1
(DSC20)
Fix this bit to “0.”
Read-only
Test bit
30: F2
1: F1
Field determination
flag(DSC23)
4 0: Method (1)
1: Method (2)
Vertical synchronous signal
(V
sep
) generating method
selection bit (DSC24)
0
5 0: Match
1: Mismatch
V-pulse shape
determination flag (DSC25)
Indeterminate
B
After resetFunction
s
Nam
e
Definition of fields 1 (F1) and 2 (F2)
H
sep
V
sep
F1:
H
sep
V
sep
F2:
0
Indeterminate
R
W
R
—
R
W
R
—
R
—
R
W
R
—
R
W
R
—
Fix this bit to “0.”
Read-only
Test bit
6
7
1
2