User`s manual

127
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
MITSUBISHI MICROCOMPUTERS
Rev. 1.0
M37281MAH–XXXSP,M37281MFH–XXXSP
M37281MKH–XXXSP,M37281EKSP
15. MULTI-MASTER I
2
C-BUS BUS LINE CHARACTERISTICS
Bus free time
Hold time for START condition
LOW period of SCL clock
Rising time of both SCL and SDA signals
Data hold time
HIGH period of SCL clock
Falling time of both SCL and SDA signals
Data set-up time
Set-up time for repeated START condition
Set-up time for STOP condition
tBUF
tHD; STA
tLOW
tR
tHD; DAT
tHIGH
tF
tSU; DAT
tSU; STA
tSU; STO
Max.
1000
300
Min.
1.3
0.6
1.3
20+0.1C
b
0
0.6
20+0.1Cb
100
0.6
0.6
Max.
300
0.9
300
µs
µs
µs
ns
µs
µs
ns
ns
µs
µs
Unit
Standard clock mode High-speed clock mode
ParameterSymbol
Note: Cb = total capacitance of 1 bus line
Fig.15.1 Definition Diagram of Timing on Multi-master I
2
C-BUS
Min.
4.7
4.0
4.7
0
4.0
250
4.7
4.0
SDA
SCL
P
tBUF
S
tHD;STA
tLOW
tR
tHD;DAT tHIGH
tF
tSU;DAT tSU;STA
Sr
P
tSU;STO
tHD;STA
S
Sr
P
: Start condition
: Restart condition
: Stop condition