To all our customers Regarding the change of names mentioned in the document, such as Mitsubishi Electric and Mitsubishi XX, to Renesas Technology Corp. The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) ✽This data sheet explains the products which have 16 KB ROM. DESCRIPTION The 3851 group is the 8-bit microcomputer based on the 740 family core technology. The 3851 group is designed for the household products and office automation equipment and includes serial I/O functions, 8-bit timer, A-D converter, and I2C-bus interface. FEATURES ●Basic machine-language instructions ......................................
2 Fig.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER PIN DESCRIPTION Table 1 Pin description Pin Functions Name VCC, VSS CNVSS Power source CNVSS input •Apply voltage of 2.7 V – 5.5 V to Vcc, and 0 V to Vss. VREF Reference voltage input Analog power source input Reset input Clock input •Reference voltage input pin for A-D converter. Function except a port function •This pin controls the operation mode of the chip. •Normally connected to VSS.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER GROUP EXPANSION Packages Mitsubishi plans to expand the 3851 group as follows: 42P2R-A ............................................ 42-pin plastic molded SSOP 42P4B ......................................... 42-pin shrink plastic-molded DIP Memory Type Support for mask ROM and One Time PROM versions. Memory Size ROM/PROM size ............................................................ 16 K bytes RAM size ..
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER FUNCTIONAL DESCRIPTION CENTRAL PROCESSING UNIT (CPU) The 3851 group uses the standard 740 Family instruction set. Refer to the table of 740 Family addressing modes and machine instructions or the 740 Family Software Manual for details on the instruction set. Machine-resident 740 Family instructions are as follows: The FST and SLW instructions cannot be used. The STP, WIT, MUL, and DIV instructions can be used.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER MEMORY Special Function Register (SFR) Area The Special Function Register area in the zero page contains control registers such as I/O ports and timers. Zero Page Access to this area with only 2 bytes is possible in the zero page addressing mode. Special Page RAM RAM is used for data storage and for stack area of subroutine calls and interrupts.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 000016 Port P0 (P0) 002016 Prescaler 12 (PRE12) 000116 Port P0 direction register (P0D) 002116 Timer 1 (T1) 000216 Port P1 (P1) 002216 Timer 2 (T2) 000316 Port P1 direction register (P1D) 002316 Timer XY mode register (TM) 000416 Port P2 (P2) 002416 Prescaler X (PREX) 000516 Port P2 direction register (P2D) 002516 Timer X (TX) 000616 Port P3 (P3) 002616 Prescaler Y (PREY) 000716 Port
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER I/O PORTS The I/O ports have direction registers which determine the input/ output direction of each individual pin. Each bit in a direction register corresponds to one pin, and each pin can be set to be input port or output port. When “0” is written to the bit corresponding to a pin, that pin becomes an input pin. When “1” is written to that bit, that pin becomes an output pin.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER (2) Port P20 (1) Ports P0, P1 Port XC switch bit Direction register Data bus Direction register Port latch Data bus Port latch Oscillator Port P21 (3) Port P21 Port XC switch bit Port XC switch bit Direction register (4) Port P22 I2 C-BUS interface enable bit SDA/SCL pin selection bit Data bus Port latch Direction register Data bus Port latch Sub-clock generating circuit input SDA output (5) P
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER (9) Port P27 (10) Ports P30–P34 Pulse output mode Serial I/O mode selection bit Serial I/O enable bit SRDY output enable bit Direction register Data bus Direction register Data bus Port latch Port latch A-D converter input Analog input pin selection bit Pulse output mode CNTR0 interrupt input Serial ready output (12) Ports P41–P43 Direction register Timer output Data bus Port latch (11) Port P40 Dire
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER INTERRUPTS ■Notes Interrupts occur by 16 sources among 16 sources: seven external, eight internal, and one software. When setting the followings, the interrupt request bit may be set to “1”.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER Table 3 Interrupt vector addresses and priority Interrupt Source Reset (Note 2) Priority 1 Vector Addresses (Note 1) High Low FFFD16 FFFC16 Interrupt Request Generating Conditions Remarks At reset Non-maskable External interrupt (active edge selectable) INT0 2 FFFB16 FFFA16 At detection of either rising or falling edge of INT0 input SCL, SDA 3 FFF916 FFF816 At detection of either rising or fallin
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER Interrupt request bit Interrupt enable bit Interrupt disable flag (I) BRK instruction Reset Interrupt request Fig. 9 Interrupt control b7 b0 Interrupt edge selection register (INTEDGE : address 003A16) INT0 active edge selection bit INT1 active edge selection bit INT2 active edge selection bit INT3 active edge selection bit Reserved (Do not write “1” to this bit.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER TIMERS Timer 1 and Timer 2 The 3851 group has four timers: timer X, timer Y, timer 1, and timer 2. The division ratio of each timer or prescaler is given by 1/(n + 1), where n is the value in the corresponding timer or prescaler latch. All timers are count down.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER Data bus f(XIN)/16 f(XIN)/2 Prescaler X latch (8) Timer X latch (8) Pulse width Timer X count source selection bit measurement Timer mode Pulse output mode mode Prescaler X (8) CNTR0 active edge selection bit “0” P27/CNTR0 Event counter mode “1” Timer X (8) Timer X count stop bit To CNTR0 interrupt request bit CNTR0 active edge selection “1” bit “0” Q Toggle flip-flop T Q R Timer X latch write puls
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER SERIAL I/O (1) Clock Synchronous Serial I/O Mode Serial I/O can be used as either clock synchronous or asynchronous (UART) serial I/O. A dedicated timer is also provided for baud rate generation. Clock synchronous serial I/O mode can be selected by setting the serial I/O mode selection bit of the serial I/O control register (bit 6 of address 001A16) to “1”.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER (2) Asynchronous Serial I/O (UART) Mode two buffers have the same address in memory. Since the shift register cannot be written to or read from directly, transmit data is written to the transmit buffer register, and receive data is read from the receive buffer register.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER Transmit or receive clock Transmit buffer write signal TBE=0 TSC=0 TBE=1 Serial output TXD TBE=0 TBE=1 ST D0 D1 SP TSC=1 ST D0 Receive buffer read signal SP D1 1 start bit 7 or 8 data bit 1 or 0 parity bit 1 or 2 stop bit (s) Generated at 2nd bit in 2-stop-bit mode RBF=0 RBF=1 Serial input RXD ST D0 D1 SP RBF=1 ST D0 D1 SP Notes 1: Error flag detection occurs at the same time that the
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER b7 b0 Serial I/O status register (SIOSTS : address 0019 16) Transmit buffer empty flag (TBE) 0: Buffer full 1: Buffer empty Receive buffer full flag (RBF) 0: Buffer empty 1: Buffer full Transmit shift completion flag (TSC) 0: Transmit shift in progress 1: Transmit shift completed Overrun error flag (OE) 0: No error 1: Overrun error Parity error flag (PE) 0: No error 1: Parity error Framing error flag (FE) 0: N
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER MULTI-MASTER I2C-BUS INTERFACE Table 4 Multi-master I2C-BUS interface functions The multi-master I2C-BUS interface is a serial communications circuit, conforming to the Philips I2C-BUS data transfer format. This interface, offering both arbitration lost detection and a synchronous functions, is useful for the multi-master serial communications.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER [I2C Data Shift Register (S0)] 002B16 The I2C data shift register (S0 : address 002B16) is an 8-bit shift register to store receive data and write transmit data. When transmit data is written into this register, it is transferred to the outside from bit 7 in synchronization with the SCL clock, and each time one-bit data is output, the data of this register are shifted by one bit to the left.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER I2 C Note: Do not write data into the clock control register during transfer. If data is written during transfer, the I 2C clock generator is reset, so that data cannot be transferred normally. 22 I2C clock control register (S2 : address 002F 16) SCL frequency control bits Refer to Table 5. SCL mode specification bit 0 : Standard clock mode 1 : High-speed clock mode ACK bit 0 : ACK is returned.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER [I2C Control Register (S1D)] 002E16 The I2C control register (address 002E16) controls data communication format. •Bits 0 to 2: Bit counter (BC0–BC2) These bits decide the number of bits for the next 1-byte data to be transmitted.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER [I2C Status Register (S1)] 002D16 The I2C status register (address 002D16) controls the I2C-BUS interface status. The low-order 4 bits are read-only bits and the high-order 4 bits can be read out and written to. Set “00002” to the low-order 4 bits, because these bits become the reserved bits at writing.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER •Bit 6: Communication mode specification bit (transfer direction specification bit: TRX) This bit decides a direction of transfer for data communication. When this bit is “0,” the reception mode is selected and the data of a transmitting device is received.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER START Condition Generating Method START/STOP Condition Detecting Operation When writing “1” to the MST, TRX, and BB bits of the I2C status register (address 002D16) at the same time after writing the slave address to the I2 C data shift register (address 002B16) with the condition in which the ES0 bit of the I2C control register (address 002E16) and the BB flag are “0”, a START condition occurs.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER [I2C START/STOP Condition Control Register (S2D)] 003016 The I2C START/STOP condition control register (address 003016) controls START/STOP condition detection.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER b7 b0 SIS SIP I2C START/STOP condition control register (S2D : address 0030 16) SSC4 SSC3 SSC2 SSC1 SSC0 START/STOP condition set bit SCL/SDA interrupt pin polarity selection bit 0 : Falling edge active 1 : Rising edge active SCL/SDA interrupt pin selection bit 0 : SDA valid 1 : SCL valid Reserved Do not write “1” to this bit. Fig.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER Example of Master Transmission An example of master transmission in the standard clock mode, at the SCL frequency of 100 kHz and in the ACK return mode is shown below. ➀ Set a slave address in the high-order 7 bits of the I2C address register (address 002C16) and “0” into the RWB bit. ➁ Set the ACK return mode and SCL = 100 kHz by setting “8516” in the I2C clock control register (address 002F16).
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER ■Precautions when using multi-master I2CBUS interface (1) Read-modify-write instruction The precautions when the read-modify-write instruction such as SEB, CLB etc. is executed for each register of the multi-master I2C-BUS interface are described below.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER PULSE WIDTH MODULATION (PWM) The 3851 group has a PWM function with an 8-bit resolution, based on a signal that is the clock input XIN or that clock input divided by 2. Data Setting The PWM output pin also functions as port P44. Set the PWM period by the PWM prescaler, and set the “H” term of output pulse by the PWM register.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER b7 b0 PWM control register (PWMCON : address 001D 16) PWM function enable bit 0: PWM disabled 1: PWM enabled Count source selection bit 0: f(XIN) 1: f(XIN)/2 Not used (return “0” when read) Fig. 34 Structure of PWM control register A B B = C T2 T C PWM output T PWM register write signal PWM prescaler write signal T T2 (Changes “H” term from “A” to “B”.) (Changes PWM period from “T” to “T2”.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER A-D CONVERTER [A-D Conversion Registers (ADL, ADH)] 003516, 003616 b7 b0 AD control register (ADCON : address 0034 16) The A-D conversion registers are read-only registers that store the result of an A-D conversion.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER WATCHDOG TIMER ●Watchdog timer H count source selection bit operation Bit 7 of the watchdog timer control register (address 003916) permits selecting a watchdog timer H count source. When this bit is set to “0”, the count source becomes the underflow signal of watchdog timer L. The detection time is set to 131.072 ms at f(XIN) = 8 MHz frequency and 32.768 s at f(XCIN) = 32 kHz frequency.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER RESET CIRCUIT To reset the microcomputer, RESET pin must be held at an “L” level for 20 cycles or more of XIN. Then the RESET pin is returned to an “H” level (the power source voltage must be between 2.7 V and 5.5 V, and the oscillation must be stable), reset is released.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER Address Register contents (1) Port P0 direction register (P0D) 000116 0016 (2) Port P1 direction register (P1D) 000316 0016 (3) Port P2 direction register (P2D) 000516 0016 (4) Port P3 direction register (P3D) 000716 0016 (5) Port P4 direction register (P4D) 000916 0016 (6) Serial I/O status register (SIOSTS) 001916 1 0 0 0 0 0 0 0 (7) Serial I/O control register (SIOCON) 001A16 (8) UA
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER CLOCK GENERATING CIRCUIT The 3851 group has two built-in oscillation circuits: main clock XIN-XOUT oscillation circuit and sub clock XCIN-X COUT oscillation circuit. An oscillation circuit can be formed by connecting a resonator between XIN and XOUT (XCIN and XCOUT ). Use the circuit constants in accordance with the resonator manufacturer’s recommended values.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER b7 b0 MISRG (MISRG : address 0038 16) Oscillation stabilizing time set after STP instruction released bit 0: Automatically set “01 16 ” to Timer 1, “FF 16 ” to Prescaler 12 1: Automatically set nothing Reserved bit “0” Do not write “1“. Not used (return “0” when read) Fig.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER Reset CM7=0 CM6=0 CM5=0(8 MHz oscillating) CM4=0(32 kHz stopped) C “0 M4 ” C ← “1 M6 →“ 1” ”← → “0 ” ” “0 4 → CM ”← 0” “1 M6 →“ C ”← “1 CM6 “1”←→“0” C “0 M7 CM ”←→ “1 6 “1 ”← ” → “0 ” CM4 “1”←→“0” CM4 “1”←→“0” CM7=0 CM6=1 CM5=0(8 MHz oscillating) CM4=0(32 kHz stopped) Middle-speed mode (f(φ)=1 MHz) CM7=0 CM6=1 CM5=0(8 MHz oscillating) CM4=1(32 kHz oscillating) High-speed mode (f(φ)=4 MHz) C M6 “1”←→“
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER NOTES ON PROGRAMMING Processor Status Register The contents of the processor status register (PS) after a reset are undefined, except for the interrupt disable flag (I) which is “1.” After a reset, initialize flags which affect program execution. In particular, it is essential to initialize the index X mode (T) and the decimal mode (D) flags because of their effect on calculations.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER DATA REQUIRED FOR MASK ORDERS ROM PROGRAMMING METHOD The following are necessary when ordering a mask ROM production: 1.Mask ROM Order Confirmation Form✽ 2.Mark Specification Form✽ 3.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER ELECTRICAL CHARACTERISTICS Table 11 Absolute maximum ratings Symbol VCC VI VI VI VI VO VO Pd Topr Tstg Parameter Conditions Power source voltage Input voltage P00–P07, P10–P17, P20, P21, P24–P27, P30–P34, P40–P44, VREF Input voltage P22, P23 Input voltage RESET, XIN Input voltage CNVSS Output voltage P00–P07, P10–P17, P20, P21, P24–P27, P30–P34, P40–P44, XOUT Output voltage P22, P23 Power dissipation Operatin
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER Table 13 Recommended operating conditions (2) (VCC = 2.7 to 5.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER Table 14 Electrical characteristics (VCC = 2.7 to 5.5 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted) Limits Symbol VOH VOL VOL Parameter “H” output voltage P00–P07, P10–P17, P20, P21, P24–P27, P30–P34, P40–P44 (Note) “L” output voltage P00–P07, P10–P12, P20–P27 P30–P34, P40–P44 “L” output voltage P13–P17 Test conditions IOH = –10 mA VCC = 4.0–5.5 V IOH = –1.0 mA VCC = 2.7–5.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER Table 15 Electrical characteristics (VCC = 2.7 to 5.5 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted) Limits Symbol ICC Parameter Power source current Test conditions High-speed mode f(XIN) = 8 MHz f(XCIN) = 32.768 kHz Output transistors “off” High-speed mode f(XIN) = 8 MHz (in WIT state) f(XCIN) = 32.768 kHz Output transistors “off” Low-speed mode f(XIN) = stopped f(XCIN) = 32.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER Table 16 A-D converter characteristics (VCC = 2.7 to 5.5 V, VSS = AVSS = 0 V, Ta = –20 to 85 °C, f(XIN) = 8 MHz, unless otherwise noted) Symbol Parameter – – Resolution Absolute accuracy (excluding quantization error) Conversion time Ladder resistor Reference power source input current A-D port input current tCONV RLADDER IVREF II(AD) 46 Test conditions VREF = 5.0 V Limits Min. 50 Typ. 35 150 0.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER TIMING REQUIREMENTS Table 17 Timing requirements (1) (VCC = 4.0 to 5.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER Table 19 Switching characteristics 1 (VCC = 4.0 to 5.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 1kΩ Measurement output pin Measurement output pin 100pF 100pF CMOS output Fig. 50 Circuit for measuring output switching characteristics (1) N-channel open-drain output Fig.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER tC(CNTR) tWL(CNTR) tWH(CNTR) 0.8VCC CNTR0, CNTR1 0.2VCC tWL(INT) tWH(INT) 0.8VCC INT0 to INT3 0.2VCC tW(RESET) RESET 0.8VCC 0.2VCC tC(XIN) tWL(XIN) tWH(XIN) 0.8VCC XIN tf SCLK 0.2VCC tWL(S CLK) tC(SCLK) tr 0.8VCC 0.2VCC tsu(RxD-SCLK) td(SCLK-TXD) Fig. 52 Timing diagram 50 th(SCLK-RxD) 0.8VCC 0.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER MULTI-MASTER I2C-BUS BUS LINE CHARACTERISTICS Table 21 Multi-master I2C-BUS bus line characteristics Standard clock mode High-speed clock mode Symbol Parameter Min. Max. Max. Unit tBUF Bus free time 4.7 Min. 1.3 tHD;STA Hold time for START condition 4.0 0.6 µs tLOW Hold time for SCL clock = “0” 4.7 1.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER PACKAGE OUTLINE 42P2R-A/E Plastic 42pin 450mil SSOP EIAJ Package Code SSOP42-P-450-0.80 Weight(g) 0.63 JEDEC Code – e b2 22 E HE e1 I2 42 Lead Material Alloy 42 Recommended Mount Pad F Dimension in Millimeters Min Nom Max 2.4 – – – – 0.05 – 2.0 – 0.4 0.3 0.25 0.2 0.15 0.13 17.7 17.5 17.3 8.6 8.4 8.2 – 0.8 – 12.23 11.93 11.63 0.7 0.5 0.3 – 1.765 – – 0.75 – – – 0.9 0.15 – – 0° – 10° – 0.5 – – 11.
MITSUBISHI MICROCOMPUTERS 3851 Group (Built-in 16 KB ROM) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER Keep safety first in your circuit designs! • Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage.
REVISION HISTORY Rev. 3851 GROUP (built-in 16 KB ROM) DATA SHEET Date Description Summary Page 1.0 05/15/98 1.1 07/26/02 First Edition 1 3 4 7 10 11 13 18 20 21 24 26 26 31 31 33 35 35 36 37 37 38 39 40 40 41 42 44 47 47 52 Group name is changed. Figure 1 is partly revised. Table 1 is partly added. Figure 3 is partly revised. Figure 6 is partly revised. Figure 8 is partly revised. ■Notes is revised. Figure 10 is partly revised. “2” of ■Notes on Serial I/O is added. Figure 19 is partly revised.