Technical information

31
MITSUBISHI MICROCOMPUTERS
3806 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Bus control with memory expansion
_____
The 3806 group has a built-in ONW function to facilitate access to
external memory and I/O devices in memory expansion mode or
microprocessor mode.
_____
If an “L” level signal is input to the ONW pin when the CPU is in a
read or write state, the corresponding read or write cycle is ex-
___
tended by one cycle of φ. During this extended period, the RD or
___
WR signal remains at “L”. This extension period is valid only for
writing to and reading from addresses 000016 to 000716 and
044016 to FFFF16 in microprocessor mode, 044016 to YYYY16 in
memory expansion mode, and only read and write cycles are ex-
tended.
_____
Fig. 30 ONW function timing
φ
Read cycle Write cycle
Dummy cycle
Write cycle
Read cycle Dummy cycle
AD 15 to AD 0
Period during which ONW input signal is received
During this period, the ONW signal must be fixed at either “H” or “L”. At all other times, the input level of the ONW
signal has no affect on operations.
The bus cycles is not extended for an address in the area 0008
16 to 043F 16, regardless of whether the ONW signal
is received.
✽ :
✽✽✽
ONW
WR
RD