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88
3886 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
5.5
5.5
5.5
VCC
VCC
VCC
VCC
5.5
5.5
5.5
VCC
5.5
VCC
5.5
VCC
0.2VCC
0.3VCC
0.6
0.2VCC
0.8
0.2VCC
0.16
VCC
f(XIN) ≤ 4.1 MHz
f(XIN) = 10 MHz
Power source voltage (flash memory version)
Power source voltage
when A-D converter is used
when D-A converter is used
Analog power source voltage
A-D converter input voltage AN0–AN7
“H” input voltage P00–P07, P10–P17, P20–P27, P30–P37, P40, P41,
P47, P50–P57, P60–P67, P80–P87
“H” input voltage P76, P77
“H” input voltage (when I
2
C-BUS input level is selected)
SDA, SCL
“H” input voltage (when SMBUS input level is selected)
SDA, SCL
“H” input voltage (when CMOS input level is selected)
P42–P46, DQ0–DQ7, W, R, S0, S1, A0
“H” input voltage (when CMOS input level is selected)
P70–P75
“H” input voltage (when TTL input level is selected)
P42–P46, DQ0–DQ7, W, R, S0, S1, A0 (Note)
“H” input voltage (when TTL input level is selected)
P70–P75 (Note)
“H” input voltage RESET, XIN, XCIN, CNVSS
“L” input voltage P00–P07, P10–P17, P20–P27, P30–P37, P40–P47,
P50–P57, P60–P67, P70–P77, P80–P87
“L” input voltage (when I
2
C-BUS input level is selected)
SDA, SCL
“L” input voltage (when SMBUS input level is selected)
SDA, SCL
“L” input voltage (when CMOS input level is selected)
P42–P46, P70–P75, DQ0–DQ7, W, R, S0, S1, A0
“L” input voltage (when TTL input level is selected)
P42–P46, P70–P75, DQ0–DQ7, W, R, S0, S1, A0 (Note)
“L” input voltage RESET, CNVSS
“L” input voltage XIN, XCIN
VCC
VCC
VSS
VREF
AVSS
VIA
VIH
VIH
VIH
VIH
VIH
VIH
VIH
VIH
VIH
VIL
VIL
VIL
VIL
VIL
VIL
VIL
Symbol Parameter
Limits
Min.
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Unit
Table 29 Recommended operating conditions
(VCC = 2.7 to 5.5 V, VCC = 4.0 to 5.5 V for flash memory version, Ta = –20 to 85 °C, unless otherwise noted)
2.7
4.0
4.0
2.0
2.7
AVSS
0.8VCC
0.8VCC
0.7VCC
1.4
0.8VCC
0.8VCC
2.0
2.0
0.8VCC
0
0
0
0
0
0
0
5.0
5.0
5.0
0
0
Typ. Max.
Note : When VCC is 4.0 to 5.5 V.
Power source voltage (except flash memory version)
Analog reference voltage