Technical information

86
3886 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
NOTES ON USAGE
Handling of Power Source Pins
In order to avoid a latch-up occurrence, connect a capacitor suit-
able for high frequencies as bypass capacitor between power
source pin (VCC pin) and GND pin (VSS pin), between power
source pin (VCC pin) and analog power source input pin (AVSS
pin), and between program power source pin (CNVss/VPP) and
GND pin for flash memory version when on-board reprogramming
is executed. Besides, connect the capacitor to as close as pos-
sible. For bypass capacitor which should not be located too far
from the pins to be connected, a ceramic capacitor of 0.01 µF–0.1
µF is recommended.
EPROM version/One Time PROM version/
Flash memory version
The CNVSS pin is connected to the internal memory circuit block
by a low-ohmic resistance, since it has the multiplexed function to
be a programmable power source pin (VPP pin) as well.
To improve the noise reduction, connect a track between CNVSS
pin and VSS pin or VCC pin with 1 to 10 kΩ resistance.
The mask ROM version track of CNVSS pin has no operational in-
terference even if it is connected to Vss pin or Vcc pin via a
resistor.
Erasing of Flash memory version
Set addresses 0100016 to 0FFFF16 as memory area for erasing in
the parallel serial I/O mode and the serial I/O mode. If the memory
area for erasing is set to mistaken area, the product may be per-
manently damaged.
DATA REQUIRED FOR MASK ORDERS
The following are necessary when ordering a mask ROM produc-
tion:
1.Mask ROM Confirmation Form
2.Mark Specification Form
3.Data to be written to ROM, in EPROM form (three identical cop-
ies)
DATA REQUIRED FOR One Time PROM
PROGRAMMING ORDERS
The following are necessary when ordering a PROM programming
service:
1.ROM Programming Confirmation Form
2.Mark Specification Form
3.Data to be programmed to PROM, in EPROM form (three identi-
cal copies)