Technical information
APPLICATION
2.3 Serial I/O
2-45
3800 GROUP USER’S MANUAL
Fig. 2.3.31 Setting of related registers at a transmitting side [Communication using UART]
b7 b0
000
b7 b0
b7 b0
Serial I/O status register (Address : 19
16
)
SIOSTS
Transmitting side
Baud rate generator (Address : 1C
16
)
BRG
SIOCON
BRG count source selection bit : f(X
IN
)/4
Serial I/O synchronous clock selection bit : BRG/16
Transmit enable bit : Transmit enabled
Receive enable bit : Receive disabled
Serial I/O mode selection bit : Asynchronous serial I/O(UART)
Serial I/O enable bit : Serial I/O enabled
S
RDY
output enable bit : Not use
S
RDY
out
UART control register (Address : 1B
16
)
UARTCON
Character length selection bit : 8 bits
Parity enable bit : Parity checking disabled
P4
5
/T
X
D P-channel output disable bit : CMOS output
Stop bit length selection bit : 2 stop bits
f(X
IN
)
Transfer bit rate ✕ 16 ✕ m
– 1
Transmit buffer empty flag
•
Check to be transferred data from the Transmit buffer
register to the Transmit shift register.
•
Writable the next transmission data to the Transmit buffer
register at being set to “1.”
Transmit shift register shift completion flag
Check a completion of transmitting 1-byte data with this flag.
“1” : Transmit shift completed
Serial I/O control register (Address : 1A
16
)
Set
when bit 0 of the Serial I/O control register (Address : 1A
16
) is set to “0,”
a value of m is 1.
when bit 0 of the Serial I/O control register (Address : 1A
16
) is set to “1,”
a value of m is 4.
✻
✻
1001 001
1
b7 b0
7