Technical information

1-4
HARDWARE
3800 GROUP USER’S MANUAL
FUNCTIONAL BLOCK
Fig. 3 Functional block diagram
FUNCTIONAL BLOCK DIAGRAM (Package : 64P4B)
FUNCTIONAL BLOCK
CNTR1
CNTR
0
INT
2
to
INT
5
RAM
ROM
CPU
A X Y S
PC
H
PCL
PS
VSS
32
RESET
27
V
CC
1 26
CNVSS
P0(8)
49 50
51 52
53
54 55
56
P1(8)
41
43
45 47
42
44
46
48
P2(8)
33 35 37 3934 36 38
40
P3(8)
57 59
61
6358
60
62
64
P4(8)
20 22 24
28
21
23
25 29
P5(8)
12
14 16 1813 15 17 19
P7(2)
32
P6(8)
4
6
105911
XIN
30
XOUT
31
Reset input
Clock generating circuit
Clock input Clock output
Prescaler 12 (8)
Timer 1 (8)
Timer 2 (8)
I/O port P4 I/O port P0I/O port P1I/O port P2I/O port P3
I/O port P5
I/O port P7
I/O port P6
7
8
Serial I/O(8)
INT
0, INT1
Prescaler X (8)
Timer X (8)
Prescaler Y (8)
Timer Y (8)
CPU
Data bus