Technical information

3800 GROUP USER’S MANUAL
APPENDIX
3.1 Electrical characteristics
3-14
Timing Diagram in Memory Expansion Mode and Microprocessor Mode (2)
Fig. 3.1.4 Timing diagram (in memory expansion mode and microprocessor mode) (2)
0.5 VCC
RD,WR
0.5 VCC
AD15–AD8
td(AH-WR)
tv(WR-AH)
0.5 VCC
AD7–AD0
td(AL-WR)
tv(WR-AL)
0.8 VCC
0.2 VCC
DB0–DB7
0.5 VCC
RD
tSU(DB-RD)
th(RD-DB)
0.5 VCC
DB0–DB7
0.5 VCC
WR
td(WR-DB)
tv(WR-DB)
th(WR-ONW)
ONW
tsu(ONW-WR)
tv(RD-AH)
td(AH-RD)
td(AL-RD)
tv(RD-AL)
th(RD-ONW)
tsu(ONW-RD)
tWL(RD)
tWL(WR)
(At CPU reading)
(At CPU writing)
tWL(RD)
tWL(WR)
0.8 VCC
0.2 VCC