Technical information

3800 GROUP USER’S MANUAL
APPENDIX
3.1 Electrical characteristics
3-12
3.1.9 Timing diagram
Timing Diagram
Fig. 3.1.2 Timing diagram (in single-chip mode)
0.2 VCC
tWL(INT)
0.8 VCC
tWH(INT)
0.2 VCC
0.2 VCC
0.8 VCC
0.8 VCC
0.2 VCC
tWL(XIN)
0.8 VCC
tWH(XIN)
tC(XIN)
XIN
0.2 VCC
0.8 VCC
tW(RESET)
RESET
tf
tr
0.2 VCC
tWL(CNTR)
0.8 VCC
tWH(CNTR)
tC(CNTR)
td(SCLK-TXD)
tv(SCLK-TXD)
tC(SCLK)
tWL(SCLK) tWH(SCLK)
th(SCLK-RXD)
tsu(SCLK-RXD)
TXD
R
XD
S
CLK
INT0–INT5
CNTR0, CNTR1