APPLICATION NOTE V850E2/MN4 A/D Converter Control R01AN0923EJ0100 Rev.1.00 Feb 13, 2012 Introduction This document explains how to set up the A/D converter (ADC) and also gives an outline of the operation and describes the procedures for using a sample program. The sample program converts the scan list of channel group (CG) 0 by using the software trigger in one-shot mode.
V850E2/MN4 1. A/D Converter Control Overview This sample program converts the scan list of CG0 by using the software trigger in one-shot mode. The number of times conversion of the scan list is repeated can be set from one to four per CG in a specific register for a given channel, but is set to one in the sample program. An A/D conversion flow is given below. See section 4.1 “Flow Charts” for the details of the individual operations.
V850E2/MN4 1.1 A/D Converter Control Initialization The general registers and functional pins are initialized. • • • • Port n function control expansion registers (PFCEn) Port n function control registers (PFCn) Port n mode control registers (PMCn) Port n mode registers (PMn) 1.2 Basic Operation of the A/D Converter This section describes the basic procedure of A/D conversion. 1.
V850E2/MN4 2. A/D Converter Control Usage Environment This section explains the circuit diagram and development environment to run this sample program. 2.1 Circuit Diagram See “V850E2/MN4 Target Board User Manual: QB-V850E2MN4DUAL-TB (R20UT0683XJ)” for the details of the circuit diagram. The main hardware resource used in this sample program is the A/D conversion pin (ANI00). The LEDs are connected to port 13. The P13_7 pin is used for LED1. The P13_6 pin is used for LED2 2.
V850E2/MN4 3. A/D Converter Control Software This section describes the organization of the compressed files to be downloaded. 3.1 File Organization The compressed files to be downloaded consist of the files that are listed below. File Name (Tool Structure) crtE.s startup.s V850E2MN4.dir V850E2_MN4 ADC.ld vector.s adc.h main.c initial.c adc_control.c interrupt.
V850E2/MN4 4. A/D Converter Control Sample Application This section explains the A/D conversion of this sample program. 4.1 Flow Charts The flow charts of this sample program are given below. 4.1.1 Main Processing The main processing sets up and then starts A/D conversion. The A/D conversion is repeated and its state is indicated by the LEDs. When A/D conversion ends, the signal for LED1 is inverted.
V850E2/MN4 4.1.2 A/D Converter Control Interrupt Processing Flow When A/D conversion ends or an A/D conversion error occurs, interrupt processing is executed accordingly. Conversion end interrupt INTADCA0I0 Conversion error interrupt INTADCA0ERR Store conversion data in RAM Turn of LED2 Invert LED1 Stop conversion Restart conversion End of processing End of processing Figure 4.2 Interrupt Processing R01AN0923EJ0100 Rev.1.
V850E2/MN4 4.2 A/D Converter Control Register Setup This section explains how to set up the relevant registers according to the flow charts shown in section 4.1. The registers described below must be configured to control the A/D converter. 4.2.1 Port Setup The LEDs are connected to port 13. The pertinent control registers must be set up as shown in the table below. The P13_7 pin is used for LED1. The P13_6 pin is used for LED2.
V850E2/MN4 4.2.3 A/D Converter Control A/D Converter Mode Control Register 1 (ADCAnCTL1) This register specifies the conversion mode and controls the conversions. Figure 4.4 ADCAnCTL1 Register Format (1/3) R01AN0923EJ0100 Rev.1.
V850E2/MN4 A/D Converter Control Figure 4.5 ADCAnCTL1 Register Format (2/3) R01AN0923EJ0100 Rev.1.
V850E2/MN4 A/D Converter Control Figure 4.6 ADCAnCTL1 Register Format (3/3) Setting example ADCA0CTL1 = 0x00028001; R01AN0923EJ0100 Rev.1.
V850E2/MN4 4.2.4 A/D Converter Control A/D Converter Channel Group Register i (ADCAnCGi) This register creates a scan list for the corresponding CG. The channels specified in the scan list are converted in ascending order. In addition, ADCAnCG0.ADCAnDIAG can be used to enable or disable the diagnosis of A/D conversion that uses the reference voltage signal (ADDIAGOUT). Figure 4.7 ADCAnCGi Register Format Setting example ADCA0CG0 = 0x00000001; R01AN0923EJ0100 Rev.1.
V850E2/MN4 4.2.5 A/D Converter Control A/D Converter Interrupt Control Register i (ADCAnIOCi) The A/D conversion end interrupt INTADCAnTi can be generated when the A/D conversion of a certain channel has been completed. This register specifies the channels for which the interrupt INTADCAnTi is generated on the completion of A/D conversion. If ADCAnIOCi is cleared to 0000 0000H, the interrupt INTADCAnTi is automatically generated on the completion of A/D conversion of CGi. Figure 4.
V850E2/MN4 4.2.6 A/D Converter Control A/D Converter Mode Control Register 0 (ADCAnCTL0) This register enables or disables the A/D converter. In addition, it specifies the number of repetitions in the one-shot conversion mode and whether to generate error interrupt requests when an A/D conversion is overwritten before it is read. Figure 4.9 ADCAnCTL0 Register Format (1/2) R01AN0923EJ0100 Rev.1.
V850E2/MN4 A/D Converter Control Figure 4.10 ADCAnCTL0 Register Format (2/2) Setting example ADCA0CTL0 = 0x0080; /* ADCATERR which is generated by ADCA0LCR register overwrite admitted; ADCATERR which is generated by ADCA0DBiCR register overwrite admitted; ADCATERR which is generated by ADCA0CmCR register overwrite admitted; A/D Controller enable ON; 1-time conversion of CG0 scanlist(channel 00) */ R01AN0923EJ0100 Rev.1.
V850E2/MN4 4.2.7 A/D Converter Control A/D Converter Software Trigger Register i (ADCAnTRGi) This trigger register is the trigger register for starting the A/D conversion of CGi. Figure 4.11 ADCAnTRGi Register Format Setting example ADCA0TRG0 = 0x01; /* conversion start */ R01AN0923EJ0100 Rev.1.
V850E2/MN4 4.2.8 A/D Converter Control A/D Conversion Result Registers (ADCAnLCR, ADCAnCmCR, and ADCAnDBiCR) ADCAnLCR ― A/D converter latest conversion result register ADCAnCmCR ― A/D converter conversion result register for channel m ADCAnDBiCR ― DMA buffer register of CGi Figure 4.12 ADCAnLCR Register Format (1/2) R01AN0923EJ0100 Rev.1.
V850E2/MN4 A/D Converter Control Figure 4.13 ADCAnLCR Register Format (2/2) R01AN0923EJ0100 Rev.1.
V850E2/MN4 A/D Converter Control Figure 4.14 ADCAnCmCR Register Format (1/2) R01AN0923EJ0100 Rev.1.
V850E2/MN4 A/D Converter Control Figure 4.15 ADCAnCmCR Register Format (2/2) R01AN0923EJ0100 Rev.1.
V850E2/MN4 A/D Converter Control Figure 4.16 ADCAnDBiCR Register Format (1/2) R01AN0923EJ0100 Rev.1.
V850E2/MN4 A/D Converter Control Figure 4.17 ADCAnDBiCR Register Format (2/2) Setting examples adc_result[0] = ADCA0LCR; adc_result[1] = ADCA0C00CR; adc_result[2] = ADCA0DB0CR; R01AN0923EJ0100 Rev.1.
V850E2/MN4 4.3 A/D Converter Control Function Specifications This section describes the specifications for the functions that are used by the sample program. 4.3.1 Main Processing (main.c) [Function Name] [Function] [Arguments] [Return Value] [Startup Method] [SFRs Used] [Calling Function] [Variables] [File Name] [Notes] 4.3.2 main () Calls necessary initialization functions before entering an infinite loop. None None Enters the main function after hardware initialization. None None None main.
V850E2/MN4 A/D Converter Control [Function Name] [Function] [Arguments] [Return Value] [Startup Method] [SFRs Used] [Calling Function] [Variables] [File Name] [Notes] hbus_initial() Initializes the AHB bus None None Call ETARCFG0, ETARADRS0, ETARMASK0 main() None initial.c None [Function Name] [Function] [Arguments] [Return Value] [Startup Method] [SFRs Used] [Calling Function] [Variables] [File Name] [Notes] board_initial() Sets up the initial state of the LEDs. None None Call P13 main() None initial.
V850E2/MN4 4.3.3 Control Processing (adc_control.c) [Function Name] [Function] [Arguments] [Return Value] [Startup Method] [SFRs Used] [Calling Function] [Variables] [File Name] [Notes] 4.3.4 A/D Converter Control adc_initial() Sets up the operation of the ADC. None None Call ICADCA0ERR, ICADCA0I0, ADCA0CNT, ADCA0CTL1, ADCA0CG0, ACA0IOC0, ADCA0TSEL0, ADCA0CTL2, ADCA0LL, ADCA0UL, ADCA0CTL0, ADCA0TRG0 main() None adc_control.c None Interrupt Processing (interrupt.
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