V850E2/MN4 Timer Array Unit Control
R01AN0922EJ0100 Rev.1.00 Page 46 of 54
Jan 13, 2012
• TAUJn channel status clear register (TAUJnCSCm)
This registers is a trigger register for clearing the overflow flag TAUJnCSRm.TAUJnOVF of channel m.
Figure 4.41 TAUJnCSCm Register Format
