User manual

V850E2/MN4 Timer Array Unit Control
R01AN0922EJ0100 Rev.1.00 Page 37 of 54
Jan 13, 2012
Figure 4.32 TAUJnTPS Register Format (3/3)
Setting example
TAUJ0TPS = 0x0000; /* CK0:PCLK / 2^0 */
• TAUJn prescaler baudrate value register (TAUJnBRS)
This register specifies the division factor of prescaler clock CK3.
CK3 is generated by dividing CK3_PRE by the factor specified in this register plus one. The PCLK prescaler for
CK3_PRE is specified in TAUJnTPS.TAUJnPRS3[3:0].
This register does not use CK3. Setting this register is unnecessary.