Specifications

V850E2/MN4 CSIH Control
R01AN0924EJ0100 Rev.1.00 Page 29 of 40
Feb 10, 2012
4.2.6 CSIH Memory Control Register 0 (CSIHnMCTL0)
The CSIHnMCTL0 register selects the memory mode and timeout setting.
FIFO mode, dual buffer mode, transmit-only buffer mode, and direct access mode can be set in the CSIH as memory
modes.
The sample program uses only dual buffer mode. It does not detect timeout time.
Figure 4.18 CSIHnMCTL0 Register Format
CSIH0MCTL0 = 0x0100; /* dual buffer mode; no timeout detection */