Specifications

V850E2/MN4 CSIH Control

R01AN0924EJ0100 Rev.1.00 Page 2 of 40

Feb 10, 2012

1. Overview

This application note explains the following four operation modes of the CSIH as usage examples:

• Master dual-buffer transmit-only mode

• Slave dual-buffer receive-only mode

• Master direct-access transmit-only mode

• Slave direct-access receive-only mode

In master mode, the serial communication clock is generated by the internal baudrate generator (BRG) and supplied by

signal CSIHnTSCK. In slave mode, another device is the communication master. The communication clock is supplied.

See section 4.1 “Flow Charts” for the details of the sample program.

The main points in master dual-buffer transmit-only mode are illustrated below.

Transmit status interrupt

processing

Transmit status interrupt

Interrupt

First, an user-supplied

array is defined.

.........

End of processing

Transmit buffer

Main loop

processing

Start of transmission

End of

transmission

Yes

Transmission is started when the

CSIHnMCTL2.CSIHnBTST bit set.

Transmission is ended and

then the user flag is set to 1.

: Flow of processing

: Interrupt

Transmit data generation

processing

Figure 1.1 Master Dual-Buffer Transmit-Only Mode