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APPLICATION NOTE SH7285 Group Example of Initialization Summary This application note gives an example of configuration items to activate the SH7285 Microcomputers (MCUs). Target Device SH7285 MCU Contents 1. Introduction........................................................................................................................................ 2 2. Applications ..................................................................................................................................
SH7285 Group Example of Initialization 1. 1.1 Introduction Specifications Configure the clock pulse generator (CPG) after the reset is canceled. 1.2 Modules Used • Clock pulse generator (CPG) 1.3 Applicable Conditions MCU Operating Frequency Integrated Development Environment C compiler Compiler options REJ06B0860-0100/Rev.1.00 SH7285 Internal clock: 100 MHz Bus clock: 50 MHz Peripheral clock: 50 MHz Renesas Technology Corp. High-performance Embedded Workshop Ver.4.04.
SH7285 Group Example of Initialization 2. Applications Configuration program for the minimum hardware setup is required to execute the main function created in C code. This application note describes the configuration example for the configuration program. All of the SH7285 application notes assume to use the sample program described in this application note as the configuration program. 2.1 Sample Program The configuration program consists of several source files such as the resetprg.
SH7285 Group Example of Initialization PowerON_Reset_PC function HardwareSetup function Start Start Configure the hardware (HardwareSetup function) Set the CPG (io_set_cpg function) Initialize sections B and R (_INITSCT function) End io_set_cpg function Set the Vector base register (VBR) Start Set the Status register (SR) Set the Frequency control register (FRQCR) Set the register bank Set the MTU2S clock frequency control register (MCLKCR) Permit interrupts Set the AD clock frequency control reg
SH7285 Group Example of Initialization 2.2 CPG Operation CPG generates the internal clock (Iφ), bus clock (Bφ), peripheral clock (Pφ), MTU2S clock (Mφ), and AD clock (Aφ). It also controls the clock in low power mode. The following table gives an overview of the CPG. Figure 2 shows the CPG block diagram. Table 1 CPG Overview Item Generate clock Change frequency Control the low power mode REJ06B0860-0100/Rev.1.
SH7285 Group Example of Initialization On-chip oscillator Divider ×1 ×1/2 ×1/4 ×1/8 Internal clock (Iφ, Max. 100 MHz) Bus clock (Bφ = CK, Max. 50 MHz) Crystal oscillator XTAL PLL circuit (×8) EXTAL Oscillation stop detection Peripheral clock (Pφ, Max. 50 MHz) Oscillation stop detection circuit MTU2S clock (Mφ, Max. 100 MHz) AD clock (Aφ, Max.
SH7285 Group Example of Initialization 2.3 CPG Setting The figure below shows the flow chart of setting CPG. Internal peripheral modules are in module standby mode after the reset is canceled. The sample program clears the module standby function for internal peripheral module after setting the Frequency control register (FRQCR), MTU2S clock frequency control register (MCLKCR), and AD clock frequency control register (ACLKCR). For details on these registers, refer to the SH7285 Group Hardware Manual.
SH7285 Group Example of Initialization 2.4 Setting in the Sample Program Table 2 lists the setting in the sample program. Table 3 and Table 4 list register settings for each module. Table 2 Module Setting in the Sample Program Module Clock pulse generator (CPG) Setting • Clock frequency (input clock is 12.
SH7285 Group Example of Initialization Table 4 CPG Register Settings (2/2) Register Name Standby control register 3 (STBCR3) Address H'FFFE 0408 Setting H'02 Standby control register 4 (STBCR4) H'FFFE 040C H'E2 Standby control register 5 (STBCR5) H'FFFE 0418 H'12 Standby control register 6 (STBCR6) H'FFFE 041C H'9F REJ06B0860-0100/Rev.1.
SH7285 Group Example of Initialization 3. Sample Program Listing 3.1 Sample Program Listing "resetprg.c" (1/3) 1 /******************************************************************************* 2 * 3 * 4 * This software is supplied by Renesas Technology Corp. and is only 5 * intended for use with Renesas products. 6 * 7 * This software is owned by Renesas Technology Corp. and is protected under 8 * all applicable laws, including copyright laws.
SH7285 Group Example of Initialization 3.2 Sample Program Listing "resetprg.
SH7285 Group Example of Initialization 3.3 Sample Program Listing "resetprg.c" (3/3) 95 /* ==== Vector Base Register setting ==== */ 96 set_vbr((void *)((char *)&INT_Vectors - INT_OFFSET)); 97 98 /* ==== Status Register initialization ==== */ 99 set_cr(SR_Init); 100 nop(); 101 102 /* ==== Bank Number Register setting ==== */ 103 INTC.IBNR.BIT.
SH7285 Group Example of Initialization 3.4 Sample Program Listing "hwsetup.c" (1/2) 1 /******************************************************************************* 2 * 3 * 4 * This software is supplied by Renesas Technology Corp. and is only 5 * intended for use with Renesas products. 6 * 7 * This software is owned by Renesas Technology Corp. and is protected under 8 * all applicable laws, including copyright laws.
SH7285 Group Example of Initialization 3.5 Sample Program Listing "hwsetup.
SH7285 Group Example of Initialization 3.6 Sample Program Listing "cpg.c" (1/2) 1 /******************************************************************************* 2 * 3 * 4 * This software is supplied by Renesas Technology Corp. and is only 5 * intended for use with Renesas products. 6 * 7 * This software is owned by Renesas Technology Corp. and is protected under 8 * all applicable laws, including copyright laws.
SH7285 Group Example of Initialization 3.7 Sample Program Listing "cpg.
SH7285 Group Example of Initialization 3.8 Sample Program Listing "vecttbl.c" (1/2) 1 /******************************************************************************* 2 * 3 * 4 * This software is supplied by Renesas Technology Corp. and is only 5 * intended for use with Renesas products. 6 * 7 * This software is owned by Renesas Technology Corp. and is protected under 8 * all applicable laws, including copyright laws.
SH7285 Group Example of Initialization 3.9 Sample Program Listing "vecttbl.c" (2/2) 51 // <> 52 // 1 Power On Reset SP 53 __secend("S"), 54 // <> 55 // 2 Manual Reset PC 56 (void *)Manual_Reset_PC, 57 // <> 58 // 3 Manual Reset SP 59 60 __secend("S") }; 61 62 #pragma section INTTBL 63 void *INT_Vectors[] = { 64 // 4 Illegal code 65 (void *)INT_Illegal_code, ... ...
SH7285 Group Example of Initialization 4. References • Software Manual SH-1/SH2/SH-DSP Software Manual Rev. 7.00 (Download the latest version from the Renesas website.) • Hardware Manual SH7280 Group Hardware Manual Rev. 2.00 (Download the latest version from the Renesas website.) REJ06B0860-0100/Rev.1.
SH7285 Group Example of Initialization Website and Support Renesas Technology Website http://www.renesas.com/ Inquiries http://www.renesas.com/inquiry csc@renesas.com Revision History Rev. 1.00 Date Jun 30, 2009 Description Page Summary — First edition issued All trademarks and registered trademarks are the property of their respective owners. REJ06B0860-0100/Rev.1.
SH7285 Group Example of Initialization Notes regarding these materials 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use.
