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Features and Specifications

2.3.3 External Synchronous DRAM

Rev.1.01

Oct 28, .2008 2-8

REJ10J1351-0101

Figure 2.3.4 shows a timing example of SDRAM mode register writing.

Tpw Trr

CKIO

Trc Trc

Tnop

Tmw

PALL

DESL

REF

DESL DESL

Hi-Z

(High)

CS3#

RASL#

CASL#

RD/WR#

DQMUU-LL

D15-0

A11-A1(A9-A0)

A12(A10/AP)

SDRAM

Command

[Symbols Descriptions]

PALL

: All bank precharge command

REF : Auto-refreshing command

MRS

: Mode register write commamd

DESL

: Deselect command

REF

DESL

MRS

DESL

DESL REF

DESL

Trc Trc

Trc

TrcTrr

Trr

REF command is issued 8 times

tRCtRP

Figure 2.3.4 Timing Example of SDRAM Mode Register Writing