Datasheet

M32C/8B Group 1. Overview
REJ03B0242-0100 Rev.1.00 Nov 01, 2009
Page 7 of 67
1.3 Block Diagram
Figure 1.2 shows a block diagram of the M32C/8B Group.
Figure 1.2 Block Diagram
Port P0
8-bit D/A converters:
2 circuits
Serial Interface: 5 channels
X/Y converter:
16 bits
× 16 bits
CRC calculation circuit
X
16
+ X
12
+ X
5
+ 1 (CCITT)
10-bit A/D converter:
1 circuit, 34 input
(2)
Port P13 Port P12 Port P11
RAM
Multiplier
FLG
ISP
INTB
USP
PC
SVF
SVP
VCT
<VCC2>
<VCC1><VCC2>
Internal peripheral functions
Memory
R0H R0L
R2
M32C/80 Series CPU core
Port P1 Port P2 Port P3 Port P4 Port P5 Port P6 Port P7
Watchdog timer (15 bits)
Clock generation circuits:
XIN-XOUT
XCIN-XCOUT
On-chip oscillator
PLL frequency synthesizer
DMAC: 4 channels DMACII
Three-phase motor
control circuit
Timers (16-bit)
Output (timer A): 5
Input (timer B): 6
R1H R1L
R3
FB
SB
A0
A1
8 8 8 8 8 8 8 8
8 8 5
Port P15 Port P14 Port P10
<VCC1>
8
87
Port P9
8
P8_5 Port P8
7
NOTES:
1. Ports P11 to P15 are provided in the 144-pin package only.
2. 34 channels are available in the 144-pin package. 26 channels are available in the 100-pin package.
(1) (1) (1) (1) (1)
ROM