Datasheet

M32C/8B Group 5. Electrical Characteristics
REJ03B0242-0100 Rev.1.00 Nov 01, 2009
Page 63 of 67
Figure 5.7 VCC1 = VCC2 = 3.3 V Timing Diagram (1)
VCC1=VCC2=3.3V
TAiIN input
tc(TA)
tw(TAH)
tw(TAL)
TAiOUT input
tc(UP)
tw(UPH)
tw(UPL)
TAiOUT input (counter increment/
decrement select input)
TAiIN input (count on falling edge)
TAiIN input (count on rising edge)
th(TIN-UP) tsu(UP-TIN)
In event counter mode
TBiIN input
tc(TB)
tw(TBH)
tw(TBL)
ADTRG input
tc(AD)
tw(ADL)
CLKi
tc(CK)
tw(CKH)
tw(CKL)
TXDi
th(C-Q)
td(C-Q)
RXDi
tsu(D-C)
th(C-D)
INTi input
tw(INL)
tw(INH)
NMI input
2 CPU clock cycles
+ 300 ns or more
2 CPU clock cycles
+ 300 ns or more
("L" width)
XIN input
tc
tw(L)tw(H)
tr tf
TAiIN input
TAiOUT input
In event counter mode with two-phase pulse
tc(TA)
tsu(TAIN-TAOUT)tsu(TAIN-TAOUT)
tsu(TAOUT-TAIN)
tsu(TAOUT-TAIN)
tw(ADH)