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To our customers,

Old Company Name in Catalogs and Other Documents

On April 1

, 2010, NEC Electronics Corporation merged with Renesas Technology

Corporation, and Renesas Electronics Corporation took over all the business of both

companies. Therefore, although the old company name remains in this document, it is a valid

Renesas Electronics document. We appreciate your understanding.

Renesas Electronics website: http://www.renesas.com

April 1

, 2010

Renesas Electronics Corporation

Issued by: Renesas Electronics Corporation (http://www.renesas.com)

Send any inquiries to http://www.renesas.com/inquiry

Summary of content (70 pages)

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To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid Renesas Electronics document. We appreciate your understanding. Renesas Electronics website: http://www.renesas.
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Notice 1. 2. 3. 4. 5. 6. 7. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office.
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M32C/8A Group RENESAS MCU 1. REJ03B0213-0111 Rev.1.11 Mar 31, 2009 Overview 1.1 Features The M32C/8A Group is a single-chip control MCU, fabricated using high-performance silicon gate CMOS technology, embedding the M32C/80 Series CPU core. The M32C/8A Group is housed in 144-pin and 100-pin plastic molded LQFP packages. With a 16-Mbyte address space, this MCU combines advanced instruction manipulation capabilities to process complex instructions by less bytes and execute instructions at higher speed.
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M32C/8A Group Table 1.1 Item CPU 1. Overview Specifications (144-Pin Package) (1/2) Function Central processing unit Specification M32C/80 core (multiplier: 16 bits × 16 bits → 32 bits, multiply-addition operation instructions: 16 × 16 + 48 → 48 bits) • Basic instructions: 108 • Minimum instruction execution time: 31.3 ns ( f(CPU) = 32 MHz / VCC1 = 4.2 to 5.5 V) 41.7 ns ( f(CPU) = 24 MHz / VCC1 = 3.0 to 5.5 V) • Operating mode: microprocessor mode Memory ROM, RAM See Table 1.5 Product List.
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M32C/8A Group Table 1.2 Item Serial Interface 1.
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M32C/8A Group Table 1.3 Item CPU 1. Overview Specifications (100-Pin Package) (1/2) Function Central processing unit Specification M32C/80 core (multiplier: 16 bits × 16 bits → 32 bits, multiply-addition operation instructions: 16 × 16 + 48 → 48 bits) • Basic instructions: 108 • Minimum instruction execution time: 31.3 ns (f(CPU) = 32 MHz / VCC1 = 4.2 to 5.5 V) 41.7 ns (f(CPU) = 24 MHz / VCC1 = 3.0 to 5.5 V) • Operating mode: microprocessor mode Memory ROM, RAM See Table 1.5 Product List.
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M32C/8A Group Table 1.4 Item Serial Interface 1.
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M32C/8A Group 1.2 1. Overview Product List Table 1.5 lists product information. Figure 1.1 shows product numbering system. Table 1.5 Product List Part Number M308A0SGP M308A3SGP M308A5SGP Current as of Mar. 2009 Package Code PLQP0100KB-A (100P6Q-A) PLQP0100KB-A (100P6Q-A) PLQP0144KA-A (144P6Q-A) Part No.
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M32C/8A Group 1.3 1. Overview Block Diagram Figure 1.2 shows a block diagram of the M32C/8A Group.
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M32C/8A Group 1.4 1. Overview Pin Assignments Figures 1.3 and 1.4 show pin assignments (top view).
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M32C/8A Group Table 1.6 Pin No. 1.
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M32C/8A Group Table 1.7 Pin No. 1.
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M32C/8A Group Table 1.8 Pin No. 1.
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M32C/8A Group 1.
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M32C/8A Group Table 1.9 Pin No. 1.
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M32C/8A Group Table 1.10 Pin No. 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 1.
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M32C/8A Group 1.5 1. Overview Pin Functions Table 1.11 Item Power supply Analog power supply input Reset input Pin Functions (100-Pin and 144-Pin Packages) (1/3) Pin Name VCC1,VCC2 VSS AVCC AVSS RESET CNVSS CNVSS External data bus width select input Bus control Pins BYTE D0 to D7 D8 to D15 A0 to A22 A23 A0/D0 to A7/D7 I/O Supply Description Type Voltage − − Apply 3.0 to 5.5 V to pins VCC1 and VCC2, and 0 V to the VSS pin. The input condition of VCC1 ≥ VCC2 must be met.
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M32C/8A Group Table 1.12 Item Main clock input Main clock output Sub clock input Sub clock output BCLK output Clock output 1. Overview Pin Functions (100-Pin and 144-Pin Packages) (2/3) Pin Name XIN XOUT I/O Supply Description Type Voltage I VCC1 Input/output pins for the main clock oscillation circuit. Connect a ceramic resonator or crystal oscillator between XIN and XOUT. To O VCC1 apply an external clock, apply it to XIN and leave XOUT open.
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M32C/8A Group Table 1.13 Item Reference voltage input A/D converter 1.
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M32C/8A Group 2. 2. Central Processing Unit (CPU) Central Processing Unit (CPU) Figure 2.1 shows the CPU registers. The register bank is comprised of eight registers (R0, R1, R2, R3, A0, A1, SB, and FB) out of 28 CPU registers. There are two sets of register banks.
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M32C/8A Group 2.1 2. Central Processing Unit (CPU) General Registers 2.1.1 Data Registers (R0, R1, R2, and R3) R0, R1, R2, and R3 are 16-bit registers for transfer, arithmetic and logic operations. R0 and R1 can be split into high-order (R0H/R1H) and low-order bits (R0L/R1L) to be used separately as 8-bit data registers. R0 can be combined with R2 and used as a 32-bit data register (R2R0). The same applies to R3R1. 2.1.
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M32C/8A Group 2.1.8.7 2. Central Processing Unit (CPU) Interrupt Enable Flag (I) The I flag enables maskable interrupts. Interrupts are disabled when the I flag is set to 0 and enabled when it is set to 1. The I flag becomes 0 when an interrupt request is acknowledged. 2.1.8.8 Stack Pointer Select Flag (U) ISP is selected when the U flag is set to 0. USP is selected when the U flag is set to 1.
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M32C/8A Group 3. 3. Memory Memory Figure 3.1 shows a memory map of the M32C/8A Group. The M32C/8A Group has 16-Mbyte address space from addresses 000000h to FFFFFFh. The fixed interrupt vectors are allocated in addresses FFFFDCh to FFFFFFh. They store the starting address of each interrupt routine. The internal RAM is allocated higher addresses, beginning with address 000400h. For example, a 12-Kbyte internal RAM area is allocated in addresses 000400h to 0033FFh.
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M32C/8A Group 4. 4. Special Function Registers (SFRs) Special Function Registers (SFRs) Special Function Registers (SFRs) are the control registers of peripheral functions. Tables 4.1 to 4.11 list SFR address maps. Table 4.
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M32C/8A Group Table 4.2 4.
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M32C/8A Group Table 4.3 4.
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M32C/8A Group Table 4.4 4.
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M32C/8A Group Table 4.5 4.
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M32C/8A Group Table 4.6 4.
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M32C/8A Group Table 4.7 4.
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M32C/8A Group Table 4.8 4.
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M32C/8A Group Table 4.9 4.
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M32C/8A Group Table 4.10 4.
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M32C/8A Group Table 4.11 4.
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M32C/8A Group 5. 5. Electrical Characteristics Electrical Characteristics Table 5.1 Absolute Maximum Ratings Symbol Parameter Condition Value Unit VCC1, VCC2 Supply voltage VCC1 = AVCC -0.3 to 6.0 V VCC2 Supply voltage − -0.3 to VCC1 + 0.1 V AVCC Analog supply voltage VCC1 = AVCC -0.3 to 6.0 V VI Input voltage RESET, CNVSS, BYTE, P6_0 to P6_7, P7_2 to P7_7, P8_0 to P8_7, P9_0 to P9_7, P10_0 to P10_7, P14_0 to P14_6, P15_0 to P15_7(1), VREF, XIN -0.3 to VCC1 + 0.
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M32C/8A Group Table 5.2 5. Electrical Characteristics Recommended Operating Conditions (1/3) (VCC1 = VCC2 = 3.0 to 5.5 V, Topr = -20 to 85°C unless otherwise specified) Symbol Parameter VCC1, VCC2 Supply voltage (VCC1 ≥ VCC2) AVCC Analog supply voltage Standard Min. Typ. Max. 3.0 5.0 5.5 VCC1 Unit V V VSS Supply voltage 0 V AVSS Analog supply voltage 0 V VIH 0.
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M32C/8A Group Table 5.3 5. Electrical Characteristics Recommended Operating Conditions (2/3) (VCC1 = VCC2 = 3.0 to 5.5 V, Topr = -20 to 85°C unless otherwise specified) Symbol Parameter Standard Min. Typ. Max.
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M32C/8A Group Table 5.4 5. Electrical Characteristics Recommended Operating Conditions (3/3) (VCC1 = VCC2 = 3.0 to 5.5 V, Topr = -20 to 85°C unless otherwise specified) Symbol f(CPU) Standard Parameter Min. Typ. Max. Unit CPU clock frequency (same frequency as f(BCLK)) VCC1 = 4.2 to 5.5V 0 32 MHz VCC1 = 3.0 to 5.5V 0 24 MHz f(XIN) Main clock input frequency VCC1 = 4.2 to 5.5V 0 32 MHz VCC1 = 3.0 to 5.5V 0 f(XCIN) Sub clock frequency f(Ring) On-chip oscillator frequency 0.
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M32C/8A Group 5. Electrical Characteristics VCC1 = VCC2 = 5V Table 5.5 Electrical Characteristics (1/3) (VCC1 = VCC2 = 4.2 to 5.5 V, VSS = 0 V, Topr = -20 to 85°C, f(CPU) = 32 MHz unless otherwise specified) Symbol VOH Parameter Output high “H” voltage Max. VCC2 - 2.0 VCC2 P6_0 to P6_7, P7_2 to P7_7, P8_0 to P8_4, P8_6, P8_7, P9_0 to P9_7,P10_0 to P10_7, P14_0 to P14_6, P15_0 to P15_7(1) IOH = -5 mA VCC1 - 2.0 VCC1 P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7 IOH = -200 μA VCC2 - 0.
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M32C/8A Group 5. Electrical Characteristics VCC1 = VCC2 = 5V Table 5.6 Electrical Characteristics (2/3) (VCC1 = VCC2 = 4.2 to 5.5 V, VSS = 0 V, Topr = -20 to 85°C, f(CPU) = 32 MHz unless otherwise specified) Symbol Parameter Condition Standard Min. Typ. Max.
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M32C/8A Group 5. Electrical Characteristics VCC1 = VCC2 = 5V Table 5.7 Electrical Characteristics (3/3) (VCC1 = VCC2 = 5.5 V, VSS = 0 V, Topr = 25°C) Symbol Parameter ICC Power supply current Condition ROMless version Standard Min. Typ. Max.
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M32C/8A Group 5. Electrical Characteristics VCC1 = VCC2 = 5V Table 5.8 Symbol A/D Conversion Characteristics (VCC1 = VCC2 = AVCC = VREF = 4.2 to 5.5 V, VSS = AVSS = 0 V, Topr = -20 to 85°C, f(CPU) = 32MHz unless otherwise specified) Parameter Measurement Condition − Resolution VREF = VCC1 INL Integral nonlinearity error VREF = VCC1 = VCC2 = 5 V Standard Min. Typ. Max.
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M32C/8A Group 5. Electrical Characteristics VCC1 = VCC2 = 5V Table 5.10 Voltage Detection Circuit Electrical Characteristics (VCC1 = VCC2 = 3.0 to 5.5 V, VSS = 0 V, Topr = 25°C unless otherwise specified) Symbol Standard Parameter Vdet4 Vdet4 detection voltage Vdet3 Vdet3 detection voltage Vdet3s Hardware reset 2 hold voltage Vdet3r Hardware reset 2 release voltage Min. Typ. Max. 3.3 3.8 4.4 3.0 VCC1 = 3.0 V to 5.5 V Unit V V 2.0 3.1 V V NOTES: 1. Vdet4 > Vdet3 2.
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M32C/8A Group 5. Electrical Characteristics VCC1 = VCC2 = 5V Timing Requirements (VCC1 = VCC2 = 4.2 to 5.5 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified) Table 5.12 External Clock Input Symbol Parameter Standard Min. Max. Unit tc External clock input cycle time 31.25 ns tw(H) External clock input high (“H”) pulse width 13.75 ns tw(L) External clock input low (“L”) pulse width 13.75 ns tr External clock rise time 5 ns tf External clock fall time 5 ns Table 5.
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M32C/8A Group 5. Electrical Characteristics VCC1 = VCC2 = 5V Timing Requirements (VCC1 = VCC2 = 4.2 to 5.5 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified) Table 5.17 Timer A Input (Counter Increment/Decrement Input in Event Counter Mode) Symbol tc(UP) Parameter TAiOUT input cycle time Standard Min. Max.
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M32C/8A Group 5. Electrical Characteristics VCC1 = VCC2 = 5V Timing Requirements (VCC1 = VCC2 = 4.2 to 5.5 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified) Table 5.22 A/D Trigger Input Symbol Parameter Standard Min. Max. Unit tc(AD) ADTRG input cycle time (required for trigger) 1000 ns tw(ADL) ADTRG input low (“L”) pulse width 125 ns Table 5.23 Serial Interface Symbol Parameter Standard Min. Max.
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M32C/8A Group 5. Electrical Characteristics VCC1 = VCC2 = 5V Timing Requirements (VCC1 = VCC2 = 4.2 to 5.5 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified) Table 5.25 Microprocessor Mode Symbol Parameter Standard Min. Max.
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M32C/8A Group 5. Electrical Characteristics VCC1 = VCC2 = 5V Switching Characteristics (VCC1 = VCC2 = 4.2 to 5.5 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified) Table 5.26 Microprocessor Mode (when accessing external memory space) Symbol Measurement Condition Parameter Standard Min. Max.
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M32C/8A Group 5. Electrical Characteristics VCC1 = VCC2 = 5V Switching Characteristics (VCC1 = VCC2 = 4.2 to 5.5 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified) Table 5.27 Microprocessor Mode (when accessing external memory space with multiplexed bus) Symbol Parameter Measurement Condition Standard Min. Max.
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M32C/8A Group 5. Electrical Characteristics P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 30 pF Note 1 NOTE: 1. P11 to P15 are provided in the 144-pin package only. Figure 5.2 P0 to P15 Measurement Circuit REJ03B0213-0111 Rev.1.
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M32C/8A Group 5.
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M32C/8A Group 5. Electrical Characteristics VCC1=VCC2=5V Microprocessor Mode BCLK RD (Separate bus) WR, WRL, WRH (Separate bus) RD (Multiplexed bus) WR, WRL, WRH (Multiplexed bus) RDY Input tsu(RDY-BCLK) th(BCLK-RDY) BCLK tsu(HOLD-BCLK) HOLD Input th(BCLK-HOLD) HLDA Output td(BCLK-HLDA) P0, P1, P2, P3, P4, P5_0 to P5_2 td(BCLK-HLDA) Hi-Z Measurement Conditions -VCC1 = VCC2 = 4.2 to 5.5 V -Input high and low voltage: VIH = 4.0 V, VIL = 1.0 V -Output high and low voltage: VOH = 2.
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M32C/8A Group 5. Electrical Characteristics Microprocessor Mode (when accessing an external memory space) VCC1=VCC2=5V Read Timing (1φ + 1φ Bus Cycle) BCLK th(BCLK-CS) -3ns.min td(BCLK-CS) 18ns.max(1) CSi tcyc th(RD-CS) 0ns.min td(BCLK-AD) 18ns.max(1) th(BCLK-AD) -3ns.min ADi BHE th(RD-AD) 0ns.min td(BCLK-RD) 18ns.max RD th(BCLK-RD) -5ns.min tac1(RD-DB)(2) tac1(AD-DB)(2) DBi Hi-Z tsu(DB-BCLK) 26ns.min(1) th(RD-DB) 0ns.min NOTES: 1. Values guaranteed only when the MCU is used stand-alone.
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M32C/8A Group 5. Electrical Characteristics Microprocessor Mode (when accessing an external memory space with the multiplexed bus) VCC1=VCC2=5V Read Timing (2φ + 2φ Bus Cycle) BCLK td(BCLK-ALE) 18ns.max th(BCLK-ALE) -2ns.min ALE td(BCLK-CS) 18ns.max th(BCLK-CS) -3ns.min tcyc th(RD-CS)(1) CSi ADi /DBi tsu(DB-BCLK) 26ns.min th(ALE-AD)(1) td(AD-ALE)(1) Address Data input tdz(RD-AD) 8ns.max td(BCLK-AD) 18ns.max Address th(RD-DB) 0ns.min th(BCLK-AD) -3ns.
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M32C/8A Group 5. Electrical Characteristics VCC1 = VCC2 = 3.3 V Table 5.28 Electrical Characteristics (1/3) (VCC1 = VCC2 = 3.0 to 3.
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M32C/8A Group 5. Electrical Characteristics VCC1 = VCC2 = 3.3 V Table 5.29 Electrical Characteristics (2/3) (VCC1 = VCC2 = 3.0 to 3.
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M32C/8A Group 5. Electrical Characteristics VCC1 = VCC2 = 3.3 V Table 5.31 A/D Conversion Characteristics (VCC1 = VCC2 = AVCC = VREF = 3.0 to 3.6 V, VSS = AVSS = 0 V, Topr = -20 to 85°C, f(CPU) = 24MHz unless otherwise specified) Symbol Parameter Measurement Condition Standard Min. Typ. Max. Unit − Resolution VREF = VCC1 10 Bits INL Integral nonlinearity error (8-bit) VREF = VCC1 = VCC2 = 3.
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M32C/8A Group 5. Electrical Characteristics VCC1 = VCC2 = 3.3 V Timing Requirements (VCC1 = VCC2 = 3.0 to 3.6 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified) Table 5.33 External Clock Input Symbol Parameter Standard Min. Max. Unit tc External clock input cycle time 41 ns tw(H) External clock input high (“H”) pulse width 18 ns tw(L) External clock input low (“L”) pulse width 18 tr External clock rise time 5 ns tf External clock fall time 5 ns Table 5.
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M32C/8A Group 5. Electrical Characteristics VCC1 = VCC2 = 3.3 V Timing Requirements (VCC1 = VCC2 = 3.0 to 3.6 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified) Table 5.38 Timer A Input (Counter Increment/Decrement Input in Event Counter Mode) Symbol Parameter Standard Min. Max.
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M32C/8A Group 5. Electrical Characteristics VCC1 = VCC2 = 3.3 V Timing Requirements (VCC1 = VCC2 = 3.0 to 3.6 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified) Table 5.43 A/D Trigger Input Symbol Parameter Standard Min. Max. Unit tc(AD) ADTRG input cycle time (required for trigger) 1000 ns tw(ADL) ADTRG input low (“L”) pulse width 125 ns Table 5.44 Serial Interface Symbol Parameter Standard Min. Max.
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M32C/8A Group 5. Electrical Characteristics VCC1 = VCC2 = 3.3 V Timing Requirements (VCC1 = VCC2 = 3.0 to 3.6 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified) Table 5.46 Microprocessor Mode Symbol Parameter Standard Min. Max.
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M32C/8A Group 5. Electrical Characteristics VCC1 = VCC2 = 3.3 V Switching Characteristics (VCC1 = VCC2 = 3.0 to 3.6 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified) Table 5.47 Microprocessor Mode (when accessing external memory space) Symbol Measurement Condition Parameter Standard Min. Max.
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M32C/8A Group 5. Electrical Characteristics VCC1 = VCC2 = 3.3 V Switching Characteristics (VCC1 = VCC2 = 3.0 to 3.6 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified) Table 5.48 Microprocessor Mode (when accessing external memory space with multiplexed bus) Symbol Measurement Condition Parameter td(BCLK-AD) Address output delay time th(BCLK-AD) Address output hold time (BCLK standard) Standard Min. Max.
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M32C/8A Group 5. Electrical Characteristics VCC1=VCC2=3.
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M32C/8A Group 5. Electrical Characteristics VCC1=VCC2=3.3V Microprocessor Mode BCLK RD (Separate bus) WR, WRL, WRH (Separate bus) RD (Multiplexed bus) WR, WRL, WRH (Multiplexed bus) RDY Input tsu(RDY-BCLK) th(BCLK-RDY) BCLK tsu(HOLD-BCLK) HOLD Input th(BCLK-HOLD) HLDA Output td(BCLK-HLDA) P0, P1, P2, P3, P4, P5_0 to P5_2 td(BCLK-HLDA) Hi-Z Measurement Conditions -VCC1 = VCC2 = 3.0 to 3.6 V -Input high and low voltage: VIH = 2.4 V, VIL = 0.6 V -Output high and low voltage: VOH = 1.
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M32C/8A Group 5. Electrical Characteristics Microprocessor Mode (when accessing an external memory space) VCC1=VCC2=3.3V Read Timing (1φ + 1φ Bus Cycle) BCLK th(BCLK-CS) 0ns.min td(BCLK-CS) 18ns.max(1) CSi tcyc th(RD-CS) 0ns.min td(BCLK-AD) 18ns.max(1) th(BCLK-AD) 0ns.min ADi BHE th(RD-AD) 0ns.min td(BCLK-RD) 18ns.max RD th(BCLK-RD) -3ns.min tac1(RD-DB)(2) tac1(AD-DB)(2) DBi Hi-Z tsu(DB-BCLK) 30ns.min(1) th(RD-DB) 0ns.min NOTES: 1. Values guaranteed only when the MCU is used stand-alone.
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M32C/8A Group 5. Electrical Characteristics Microprocessor Mode (when accessing an external memory space with the multiplexed bus) VCC1=VCC2=3.3V Read Timing (2φ + 2φ Bus Cycle) BCLK td(BCLK-ALE) 18ns.max th(BCLK-ALE) -2ns.min ALE td(BCLK-CS) 18ns.max th(BCLK-CS) 0ns.min tcyc th(RD-CS)(1) CSi ADi /DBi tsu(DB-BCLK) 30ns.min th(ALE-AD)(1) td(AD-ALE)(1) Address Data input tdz(RD-AD) 8ns.max td(BCLK-AD) 18ns.max Address th(RD-DB) 0ns.min th(BCLK-AD) 0ns.
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M32C/8A Group Appendix 1. Package Dimensions Appendix 1. Package Dimensions JEITA Package Code P-LQFP144-20x20-0.50 RENESAS Code PLQP0144KA-A Previous Code 144P6Q-A / FP-144L / FP-144LV MASS[Typ.] 1.2g HD *1 D 108 73 109 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
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REVISION HISTORY M32C/8A Group Datasheet Description Rev. Date 1.00 Apr 01, 2007 − First Edition issued 1.10 Jul 15, 2007 − 6 • 144-pin package added • Table “Product list” revised 1.11 Mar 31, 2009 − Throughout this manual [description modified] • Title of group tables “(current table number / total tables)” added Page 3, 5 6 8, 12 32 33 39,54 Summary Overview • Table 1.2, 1.4 Serial Interface “Optional” deleted • Table 1.2, 1.
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Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Notes: 1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use.