Datasheet

M32C/87 Group (M32C/87, M32C/87A, M32C/87B) 4. Special Function Registers (SFRs)
REJ03B0127-0151 Rev.1.51 Jul 31, 2008
Page 43 of 85
Table 4.17 SFR Address Map (17/20)
X: Undefined
Blank spaces are all reserved. No access is allowed.
NOTE:
1. The TCSPR register maintains values set before reset, even after software reset or watchdog timer reset has been performed.
Address Register Symbol After Reset
0350h
Timer B0 Register TB0 XXXXh
0351h
0352h
Timer B1 Register TB1 XXXXh
0353h
0354h
Timer B2 Register TB2 XXXXh
0355h
0356h Timer A0 Mode Register TA0MR 00h
0357h Timer A1 Mode Register TA1MR 00h
0358h Timer A2 Mode Register TA2MR 00h
0359h Timer A3 Mode Register TA3MR 00h
035Ah Timer A4 Mode Register TA4MR 00h
035Bh Timer B0 Mode Register TB0MR 00XX 0000b
035Ch Timer B1 Mode Register TB1MR 00XX 0000b
035Dh Timer B2 Mode Register TB2MR 00XX 0000b
035Eh Timer B2 Special Mode Register TB2SC XXXX XXX0b
035Fh Count Source Prescaler Register
(1)
TCSPR 0XXX 0000b
0360h
0361h
0362h
0363h
0364h UART0 Special Mode Register 4 U0SMR4 00h
0365h UART0 Special Mode Register 3 U0SMR3 00h
0366h UART0 Special Mode Register 2 U0SMR2 00h
0367h UART0 Special Mode Register U0SMR 00h
0368h UART0 Transmit/Receive Mode Register U0MR 00h
0369h UART0 Baud Rate Register U0BRG XXh
036Ah
UART0 Transmit Buffer Register U0TB XXXXh
036Bh
036Ch UART0 Transmit/Receive Control Register 0 U0C0 0000 1000b
036Dh UART0 Transmit/Receive Control Register 1 U0C1 0000 0010b
036Eh
UART0 Receive Buffer Register U0RB XXXXh
036Fh
0370h
0371h
0372h IrDA Control Register IRCON X000 0000b
0373h
0374h
0375h
0376h
0377h
0378h DMA0 Request Source Select Register DM0SL 0X00 0000b
0379h DMA1 Request Source Select Register DM1SL 0X00 0000b
037Ah DMA2 Request Source Select Register DM2SL 0X00 0000b
037Bh DMA3 Request Source Select Register DM3SL 0X00 0000b
037Ch
CRC Data Register CRCD XXXXh
037Dh
037Eh CRC Input Register CRCIN XXh
037Fh