Datasheet

Page 80
19fo6002,13.naJ14.1.veR
1410-3100B30JER
)T38/C23M,38/C23M(puorG38/C23M
Measurement Conditions:
• VCC=3.0 to 3.6V
• Input high and low voltage: V
IH =2.4V, V IL =0.6V
• Output high and low voltage: V
OH =1.5V, V OL =1.5V
Memory Expansion Mode and Microprocessor Mode
BCLK
HOLD input
HLDA output
P0, P1, P2,
P3, P4,
P5
0 to P52
(Valid with a wait state and no wait state)
(Valid only with a wait state)
RDY input
tsu(RDY–BCLK)
th(BCLK–RDY)
BCLK
RD
(Multiplexed bus)
(Multiplexed bus)
WR, WRL, WRH
WR, WRL, WRH
(Separate bus)
RD
(Separate bus)
Hi–Z
th(BCLK–HOLD)
tsu(HOLD–BCLK)
td(BCLK–HLDA)
td(BCLK–HLDA)
Vcc=3.3V
Figure 5.17 VCC=3.3V Timing Diagram (8)