Datasheet

Page 79
19fo6002,13.naJ14.1.veR
1410-3100B30JER
)T38/C23M,38/C23M(puorG38/C23M
t
su(DC)
TAiIN input
TAi
OUT input
In event counter mode
TBi
IN input
CLKi
TxDi
RxDi
t
c(TA)
t
w(TAH)
t
w(TAL)
t
c(UP)
t
w(UPH)
t
w(UPL)
t
c(TB)
t
w(TBH)
t
w(TBL)
t
c(AD)
t
w(ADL)
t
c(CK)
t
w(CKH)
t
w(CKL)
t
w(INL)
t
w(INH)
t
d(CQ)
t
h(CD)
t
h(CQ)
t
h(TINUP)
t
su(UPTIN)
TAiIN input
(When counting on falling edge)
TAiIN input
(When counting on rising edge)
TAiOUT input
(Counter increment/
decrement input)
INTi input
ADTRG input
Vcc=3.3V
NMI input
2 clock cycles + 300ns
or more
2 clock cycles + 300ns
or more ("L" width)
Figure 5.16 VCC=3.3V Timing Diagram (7)