Datasheet

Page 72
19fo6002,13.naJ14.1.veR
1410-3100B30JER
VCC=3.3V
)T38/C23M,38/C23M(puorG38/C23M
lobmySretemaraP
tnemerusaeM
noitidnoC
dradnatS
tinU
niMxaM
dt
)DAR-KLCB( emiTyaleDtuptuOsserddAwoR 81sn
ht
)DAR-KLCB( )dradnatsKLCB(emiTdloHtuptuOsserddAwoR 0sn
dt
)DAC-KLCB( emiTyaleDtuptuOsserddAnmuloC 81sn
ht
)DAC-KLCB( )dradnatsKLCB(emiTdloHtuptuOsserddAnmuloC 0sn
ht
)DAR-SAR( tuptuOSARretfaemiTdloHtuptuOsserddAwoR )1etoN(sn
dt
)SAR-KLCB( )dradnatsKLCB(emiTyaleDtuptuOSAR 81sn
ht
)SAR-KLCB( )dradnatsKLCB(emiTdloHtuptuOSAR 0sn
t
PR emiTdloH)"H"(hgiHSAR )1etoN(sn
dt
)SAC-KLCB( )dradnatsKLCB(emiTyaleDtuptuOSAC 81sn
ht
)SAC-KLCB( )dradnatsKLCB(emiTdloHtuptuOSAC 0sn
dt
)WD-KLCB( )dradnatsKLCB(emiTyaleDtuptuOWD 81sn
ht
)WD-KLCB( )dradnatsKLCB(emiTdloHtuptuOWD 3-sn
ust
)SAC-BD( tuptuoBDretfaemiTputeStuptuOSAC )1etoN(sn
ht
)BD-KLCB( )dradnatsKLCB(emiTdloHtuptuOlangiSBD 7-sn
ust
)SAR-SAC( )hserfer(tuptuOSARerofebemiTputeStuptuOSAC )1etoN(sn
:SETON
.ycneuqerfKLCBehtotgnidrocca,snoitauqegniwollofehtmorfdeniatboebnacseulaV.1
t su(CAS – RAS) =
f
(
BCLK
)
X 2
10
9
– 13 [ns]
t
h(RAS – RAD) =
f
(BCLK) X 2
10
9
– 13 [ns]
t
RP =
f
(BCLK) X 2
10 X 3
9
– 20 [ns]
t
su(DB – CAS) =
f
(BCLK)
10
9
– 20 [ns]
See Figure 5.1
Switching Characteristics
(VCC = 3.0 to 3.6V, VSS = 0V at Topr = –20 to 85
o
C unless otherwise specified)
Table 5.44 Memory Expansion Mode and Microprocessor Mode
(With a Wait State, Accessing an External Memory and Selecting the DRAM Area)