Datasheet

Page 62
19fo6002,13.naJ14.1.veR
1410-3100B30JER
)T38/C23M,38/C23M(puorG38/C23M
tsu(DC)
TAiIN input
TAi
OUT input
In event counter mode
TBi
IN input
CLKi
TxDi
RxDi
tc(TA)
tw(TAH)
tw(TAL)
tc(UP)
tw(UPH)
tw(UPL)
tc(TB)
tw(TBH)
tw(TBL)
tc(AD)
tw(ADL)
tc(CK)
tw(CKH)
tw(CKL)
tw(INL)
tw(INH)
td(CQ)
th(CD)
th(CQ)
th(T
IN
UP) tsu(UPT
IN
)
TAiIN input
(When counting on the falling edge)
TAiIN input
(When counting on the rising edge)
TAiOUT input
(Counter increment/
decrement input)
INTi input
ADTRG input
Vcc=5V
NMI input
2 clock cycles + 300ns
ore more ("L" width)
2 clock cycles + 300ns
or more
Figure 5.8 VCC=5V Timing Diagram (7)