Datasheet

Page 61
19fo6002,13.naJ14.1.veR
1410-3100B30JER
)T38/C23M,38/C23M(puorG38/C23M
tcyc
18ns.max
td(BCLK-RAS)
18ns.max
td(BCLK-CAS)
th(BCLK-RAS)
-3ns.min
th(BCLK-CAS)
-3ns.min
tsu(CAS-RAS)
(1)
18ns.max
tcyc
td(BCLK-CAS)
tsu(CAS-RAS)
(2)
th(BCLK-RAS)
-3ns.min
th(BCLK-CAS)
-3ns.min
18ns.max
td(BCLK-RAS)
BCLK
DW
tsu(CAS-RAS)=(tcyc/2-13)ns.min
Vcc=5V
RAS
CASL
CASH
BCLK
DW
tsu(CAS-RAS)=(tcyc/2-13)ns.min
RAS
CASL
CASH
NOTES :
1. Varies with operation frequency:
Measurement Conditions:
• V
CC=4.2 to 5.5V
• Input high and low voltage: V
IH=2.5V, VIL=0.8V
• Output high and low voltage: V
OH=2.0V, VOL=0.8V
Refresh Timing (CAS-before-RAS refresh)
Memory Expansion Mode and Microprocessor Mode
NOTES:
2. Varies with operation frequency:
Refresh Timing (Self-refresh)
Figure 5.7 VCC=5V Timing Diagram (6)