Datasheet
Page 56
19fo6002,13.naJ14.1.veR
1410-3100B30JER
)T38/C23M,38/C23M(puorG38/C23M
Figure 5.2 VCC=5V Timing Diagram (1)
B
C
L
K
A
L
E
-
2
n
s
.
m
i
n
R
D
1
8
n
s
.
m
a
x
-5ns.min
H
i
-
Z
D
B
0ns.min
0ns.min
td(BCLK-ALE)
th
(
B
C
L
K
-
A
L
E
)
ts
u(
D
B
-
B
C
L
K
)
td
(
B
C
L
K
-
R
D
)
26ns.min
(1)
C
S
i
td
(
B
C
L
K
-
C
S
)
1
8
n
s
.
m
a
x
(
1
)
A
D
i
th
(
B
C
L
K
-
A
D
)
-3ns.min
th
(
B
C
L
K
-
C
S
)
-
3n
s
.
m
i
n
B
H
E
t
c
y
c
td
(
B
C
L
K
-
A
D
)
0
n
s
.
m
i
n
tac1(AD-DB)
(2)
W
R
,
W
R
L
,
W
R
H
1
8
n
s
.
m
a
x
-
3
n
s
.
m
i
n
B
C
L
K
C
S
i
td
(
B
C
L
K
-
C
S
)
1
8
n
s
.
m
a
x
A
D
i
td(BCLK-AD)
1
8
n
s
.
m
a
x
td
(
B
C
L
K
-
A
L
E
)
-3ns.min
-
3
n
s
.
m
i
n
tcyc
BHE
D
B
i
td(BCLK-WR)
A
L
E
18ns.max
-
2
n
s
.
m
i
n
th
(
W
R
-
D
B
)
(
3
)
t
d
(
D
B
-
W
R
)
=
(
t
c
y
c
-
2
0
)
n
s
.
m
i
n
t
h
(
W
R
-
D
B
)
=
(
t
c
y
c
/
2
-
1
0
)
n
s
.
m
i
n
t
h
(
W
R
-
A
D
)
=
(
t
c
y
c
/
2
-
1
0
)
n
s
.
m
i
n
t
h
(
W
R
-
C
S
)
=
(
t
c
y
c
/
2
-
1
0
)
n
s
.
m
i
n
t
w(
W
R
)
=
(
t
c
y
c
/
2
-
1
5
)
n
s
.
m
i
n
Vcc=5V
th
(
B
C
L
K
-
R
D
)
th(RD-DB)
th(RD-AD)
th
(
R
D
-
C
S
)
th(BCLK-WR)
th(BCLK-ALE)
th
(
B
C
L
K
-
A
D
)
th(BCLK-CS)
th
(
W
R
-
C
S
)
(
3
)
th(WR-AD)
(3)
tw(WR)
(3)
ta
c
1
(
R
D
-
D
B
)
(
2
)
1
8
n
s
.
m
a
x
(
1
)
Re
a
d
T
i
m
i
n
g
W
r
i
t
e
T
i
m
i
n
g
(
w
r
i
t
t
e
n
i
n
2
c
y
c
l
e
s
w
i
t
h
n
o
w
a
i
t
s
t
a
t
e
)
NO
T
E
S:
3
.
Va
r
i
e
s
w
i
t
h
o
p
e
r
a
t
i
o
n
f
r
e
q
u
e
n
c
y
:
M
e
a
s
u
r
e
m
e
n
t
C
o
n
d
i
t
i
o
n
s
:
•
V
C
C=
4
.
2
t
o
5
.
5
V
•
I
n
p
u
t
h
i
g
h
a
n
d
l
o
w
v
o
l
t
a
g
e
:
V
I
H
=
2
.
5
V
,
V
I
L
=
0
.
8
V
•
O
u
t
p
u
t
h
i
g
h
a
n
d
l
o
w
v
o
l
t
a
g
e
:
V
O
H
=
2
.
0
V
,
V
O
L
=
0
.
8
V
M
e
m
o
r
y
Ex
p
a
ns
i
o
n
M
o
d
e
a
n
d
M
i
c
r
o
p
r
o
c
e
s
s
o
r
M
o
d
e
(
w
i
t
h
n
o
w
a
i
t
s
t
a
t
e
)
NOTES:
1. Values guaranteed only when the microcomputer is used independently.
A maximum of 35ns is guaranteed for t
d(BCLK-AD)
+t
su(DB-BCLK)
.
2. Varies with operation frequency:
t
ac1(RD-DB)
=(tcyc/2-35)ns.max
t
ac1(AD-DB)
=(tcyc-35)ns.max
18ns.max
td(DB-WR)
(3)