Datasheet
Page 52
19fo6002,13.naJ14.1.veR
1410-3100B30JER
VCC=5V
)T38/C23M,38/C23M(puorG38/C23M
lobmySretemaraP
tnemerusaeM
noitidnoC
dradnatS
tinU
niMxaM
dt
)DA-KLCB(
emiTyaleDtuptuOsserddA 81sn
ht
)DA-KLCB(
)dradnatsKLCB(emiTdloHtuptuOsserddA 3-sn
ht
)DA-DR(
)dradnatsDR(emiTdloHtuptuOsserddA 0sn
ht
)DA-RW(
)dradnatsRW(emiTdloHtuptuOsserddA )1etoN(sn
dt
)SC-KLCB(
emiTyaleDtuptuOlangiStceles-pihC 81sn
ht
)SC-KLCB(
)dradnatsKLCB(emiTdloHtuptuOlangiStceles-pihC 3-sn
ht
)SC-DR(
)dradnatsDR(emiTdloHtuptuOlangiStceles-pihC 0sn
ht
)SC-RW(
)dradnatsRW(emiTdloHtuptuOlangiStceles-pihC )1etoN(sn
dt
)ELA-KLCB(
emiTyaleDtuptuOlangiSELA 81sn
ht
)ELA-KLCB(
emiTdloHtuptuOlangiSELA 2-sn
dt
)DR-KLCB(
emiTyaleDtuptuOlangiSDR 81sn
ht
)DR-KLCB(
emiTdloHtuptuOlangiSDR 5-sn
dt
)RW-KLCB(
emiTyaleDtuptuOlangiSRW 81sn
ht
)RW-KLCB(
emiTdloHtuptuOlangiSRW 3-sn
dt
)RW-BD(
)dradnatsRW(emiTyaleDtuptuOataD )1etoN(sn
ht
)BD-RW(
)dradnatsRW(emiTdloHtuptuOataD )1etoN(sn
wt
)RW(
htdiWtuptuORW )1etoN(sn
:SETON
.ycneuqerfKLCBotgnidrocca,snoitauqegniwollofehtmorfdeniatboebnacseulaV.1
[ns] (n=1 with 1 wait state, n=2 with 2 wait states
and n=3 with 3 wait states)
t
d(DB – WR)
=
f
(BCLK)
10 X n
9
– 20
t
h(WR – DB)
=
f
(BCLK)
X 2
10
9
– 10
[ns]
t
h(WR – AD)
=
f
(BCLK)
X 2
10
9
– 10
[ns]
t
h(WR – CS)
=
f
(BCLK)
X 2
10
9
– 10
[ns]
[ns] (n=1 with 1 wait state, n=3 with 2 wait states
and n=5 with 3 wait states)
t
w( WR)
=
10 X n
9
– 15
f
(BCLK)
X 2
See Figure 5.1
Switching Characteristics
(VCC = 4.2 to 5.5V, VSS = 0V at Topr = –20 to 85
o
C unless otherwise specified)
Table 5.21 Memory Expansion Mode and Microprocessor Mode
(With a Wait State, Accessing an External Memory)