To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid Renesas Electronics document. We appreciate your understanding. Renesas Electronics website: http://www.renesas.
Notice 1. 2. 3. 4. 5. 6. 7. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office.
M32C/83 Group (M32C/83, M32C/83T) SINGLE-CHIP 16/32-BIT CMOS MICROCOMPUTER REJ03B0013-0141 Rev.1.41 Jan. 31, 2006 1. Overview The M32C/83 Group (M32C/83, M32C/83T) microcomputer is a single-chip control unit that utilizes highperformance silicon gate CMOS technology with the M32C/80 Series CPU core. The M32C/83 Group (M32C/83, M32C/83T) is available in 144-pin and 100-pin plastic molded LQFP/QFP packages.
M32C/83 Group (M32C/83, M32C/83T) 1.2 Performance Overview Tables 1.1 and 1.2 list performance overview of the M32C/83 Group (M32C/83, M32C/83T). Table 1.1 M32C/83 Group (M32C/83, M32C/83T) Performance (144-Pin Package) Characteristic CPU Performance M32C/83 108 instructions Basic Instructions M32C/83T Minimum Instruction Execution Time 31.3 ns (f(BCLK)=32 MHz, VCC=4.2 to 5.5 V)(3) 31.3 ns (f(BCLK)=32 MHz, VCC=4.2 to 5.5 V)(3) 50 ns (f(BCLK)=20 MHz, VCC=3.0 to 5.
M32C/83 Group (M32C/83, M32C/83T) Table 1.
M32C/83 Group (M32C/83, M32C/83T) 1.3 Block Diagram Figure 1.1 shows a block diagram of the M32C/83 Group (M32C/83, M32C/83T) microcomputer.
M32C/83 Group (M32C/83, M32C/83T) 1.4 Product Information Table 1.3 lists the product information. Figure 1.2 shows the product numbering system. Table 1.3 M32C/83 Group (1) (M32C/83) Type Number Package Type M30835FJGP PLQP0144KA-A (144P6Q-A) M30833FJGP PLQP0100KB-A (100P6Q-A) M30833FJFP PRQP0100JB-A (100P6S-A) As of January, 2006 ROM Capacity RAM Capacity Remarks 512K 31K Flash Memory Table 1.
M32C/83 Group (M32C/83, M32C/83T) 1.
M32C/83 Group (M32C/83, M32C/83T) Table 1.
M32C/83 Group (M32C/83, M32C/83T) Table 1.
M32C/83 Group (M32C/83, M32C/83T) Table 1.
Rev. 1.41 Jan.31, 2006 REJ03B0013-0141 NOTES: 1. P64 / CTS1 / RTS1 / SS1 / OUTC21 / ISCLK2 2. P97 / ADTRG / RxD4 / STxD4 / SCL4 3. P70 and P71 are ports for the N-channel open drain output. Figure 1.
P27 / A7 ( / D7 ) / AN27 Vss P30 / A8 ( MA0 ) ( / D8 ) Vcc P31 / A9 ( MA1 ) ( / D9 ) P32 / A10 ( MA2 ) ( / D10 ) P33 / A11 ( MA3 ) ( / D11 ) 63 62 61 60 59 58 57 P40 / A16 ( MA8 ) P26 / A6 ( / D6 ) / AN26 64 P41 / A17 ( MA9 ) P25 / A5 ( / D5 ) / AN25 65 51 P24 / A4 ( / D4 ) / AN24 66 P37 / A15 ( MA7 ) ( / D15 ) P23 / A3 ( / D3 ) / AN23 67 52 P22 / A2 ( / D2 ) / AN22 68 P36 / A14 ( MA6 ) ( / D14 ) P21 / A1 ( / D1 ) / AN21 69 53 P20 / A0 ( / D0 ) / AN20 70 54 P17 / D15 / INT5 71
M32C/83 Group (M32C/83, M32C/83T) Table 1.
M32C/83 Group (M32C/83, M32C/83T) Table 1.
M32C/83 Group (M32C/83, M32C/83T) 1.6 Pin Description Table 1.6 Pin Description (100-Pin and 144-Pin Packages) Classsfication Symbol I/O Type Function Power Supply VCC I Apply 3.0 to 5.5V to both VCC pin. Apply 0V to the VSS pin. (1) Analog Power VSS AVCC I Supply Reset Input AVSS ____________ RESET Supplies power to the A/D converter.
M32C/83 Group (M32C/83, M32C/83T) Table 1.6 Pin Description (100-Pin and 144-Pin Packages) (Continued) Classsfication Symbol Main Clock Input XIN I/O Type Function I/O pins for the main clock oscillation circuit. Connect a ceramic resonator I Main Clock Output XOUT O Sub Clock Input XCIN I Sub Clock Output XCOUT O Low-Pass Filter or crystal oscillator between XIN and XOUT. To apply external clock, apply it to XIN and leave XOUT open I/O pins for the sub clock oscillation circuit.
M32C/83 Group (M32C/83, M32C/83T) Table 1.
M32C/83 Group (M32C/83, M32C/83T) Table 1.6 Pin Description (144-Pin Package only) (Continued) Classsfication I/O Ports Symbol I/O Type P00 to P07 P10 to P17 I/O Function 8-bit I/O ports for CMOS. Each port can be programmed for input or output under the control of the direction register. An input port can be set, by program, for a pull-up resistor available or for no pull-up resister available in P20 to P27 P30 to P37 4-bit units (P70 and P71 are ports for the N-channel open drain output.
M32C/83 Group (M32C/83, M32C/83T) 2. Central Processing Unit (CPU) Figure 2.1 shows the CPU registers. A register bank comprises 8 registers (R0, R1, R2, R3, A0, A1, SB and FB) out of 28 CPU registers. Two sets of register banks are provided.
M32C/83 Group (M32C/83, M32C/83T) 2.1 General Registers 2.1.1 Data Registers (R0, R1, R2 and R3) R0, R1, R2 and R3 are 16-bit registers for transfer, arithmetic and logic operations. R0 and R1 can be split into high-order bits (R0H) and low-order bits (R0L) to be used separately as 8-bit data registers. R0 can be combined with R2 to be used as a 32-bit data register (R2R0). The same applies to R1 and R3. 2.1.
M32C/83 Group (M32C/83, M32C/83T) 2.1.8.5 Register Bank Select Flag (B) The register bank 0 is selected when the B flag is set to "0". The register bank 1 is selected when this flag is set to "1". 2.1.8.6 Overflow Flag (O) The O flag is set to "1" when the result of an arithmetic operation overflows; otherwise "0". 2.1.8.7 Interrupt Enable Flag (I) The I flag enables a maskable interrupt. An interrupt is disabled when the I flag is set to "0" and enabled when the I flag is set to "1".
M32C/83 Group (M32C/83, M32C/83T) 3. Memory Figure 3.1 shows a memory map of the M32C/83 group (M32C/83, M32C/83T). M32C/83 group (M32C/83, M32C/83T) provides 16-Mbyte address space from addresses 00000016 to FFFFFF16. The internal ROM is allocated lower addresses beginning with address FFFFFF16. For example, a 64Kbyte internal ROM is allocated addresses FF000016 to FFFFFF16. The fixed interrupt vectors are allocated addresses FFFFDC16 to FFFFFF16. It stores the starting address of each interrupt routine.
M32C/83 Group (M32C/83, M32C/83T) 4.
M32C/83 Group (M32C/83, M32C/83T) Address Register 003016 003116 003216 003316 003416 003516 003616 003716 003816 003916 003A16 003B16 003C16 003D16 003E16 003F16 004016 DRAM Control Register (1) 004116 DRAM Refresh Interval Set Register (1) 004216 004316 004416 004516 004616 004716 004816 004916 004A16 004B16 004C16 004D16 004E16 004F16 005016 005116 005216 005316 005416 005516 005616 005716 005816 005916 005A16 005B16 005C16 005D16 005E16 005F16 Flash Memory Control Register 0 X: Indeterminate Blank sp
M32C/83 Group (M32C/83, M32C/83T) Address 006016 006116 006216 006316 006416 006516 006616 006716 006816 006916 006A16 006B16 006C16 006D16 006E16 006F16 007016 007116 007216 007316 007416 007516 007616 007716 007816 007916 007A16 007B16 007C16 007D16 007E16 007F16 Register Symbol Value after RESET DMA0 Interrupt Control Register Timer B5 Interrupt Control Register DMA2 Interrupt Control Register UART2 Receive /ACK Interrupt Control Register Timer A0 Interrupt Control Register UART3 Receive /ACK Interr
M32C/83 Group (M32C/83, M32C/83T) Address 009016 009116 009216 009316 009416 009516 009616 009716 009816 009916 009A16 009B16 009C16 009D16 009E16 009F16 00A016 00A116 00A216 00A316 00A416 00A516 00A616 00A716 00A816 00A916 00AA16 00AB16 00AC16 00AD16 00AE16 00AF16 00B016 00B116 00B216 00B316 00B416 00B516 00B616 00B716 00B816 00B916 00BA16 00BB16 00BC16 00BD16 00BE16 00BF16 Register UART0 Transmit /NACK Interrupt Control Register UART1/UART4 Bus Conflict Detect Interrupt Control Register UART1 Transmit/N
M32C/83 Group (M32C/83, M32C/83T) Address 00C016 00C116 00C216 00C316 00C416 00C516 00C616 00C716 00C816 00C916 00CA16 00CB16 00CC16 00CD16 00CE16 00CF16 00D016 00D116 00D216 00D316 00D416 00D516 00D616 00D716 00D816 00D916 00DA16 00DB16 00DC16 00DD16 00DE16 00DF16 00E016 00E116 00E216 00E316 00E416 00E516 00E616 00E716 00E816 00E916 00EA16 00EB16 00EC16 00ED16 00EE16 00EF16 Register Symbol Value after RESET XX16 Group 0 Time Measurement/Waveform Generating Register 0 G0TM0/G0PO0 Group 0 Time Measure
M32C/83 Group (M32C/83, M32C/83T) Address 00F016 00F116 00F216 00F316 00F416 00F516 00F616 00F716 00F816 00F916 00FA16 00FB16 00FC16 00FD16 00FE16 00FF16 010016 010116 010216 010316 010416 010516 010616 010716 010816 010916 010A16 010B16 010C16 010D16 010E16 010F16 011016 011116 011216 011316 011416 011516 011616 011716 011816 011916 011A16 011B16 011C16 011D16 011E16 011F16 Register Group 0 Data Compare Register 0 Group 0 Data Compare Register 1 Group 0 Data Compare Register 2 Group 0 Data Compare Regist
M32C/83 Group (M32C/83, M32C/83T) Address 012016 012116 012216 012316 012416 012516 012616 012716 012816 012916 012A16 012B16 012C16 012D16 012E16 012F16 013016 013116 013216 013316 013416 013516 013616 013716 013816 013916 013A16 013B16 013C16 013D16 013E16 013F16 014016 014116 014216 014316 014416 014516 014616 014716 014816 014916 014A16 014B16 014C16 014D16 014E16 014F16 Register Symbol Value after RESET XX16 Group 1 Base Timer Register G1BT Group 1 Base Timer Control Register 0 Group 1 Base Time
M32C/83 Group (M32C/83, M32C/83T) Address 015016 015116 015216 015316 015416 015516 015616 015716 015816 015916 015A16 015B16 015C16 015D16 015E16 015F16 016016 016116 016216 016316 016416 016516 016616 016716 016816 016916 016A16 016B16 016C16 016D16 016E16 016F16 017016 017116 017216 017316 017416 017516 017616 017716 017816 017916 017A16 017B16 017C16 017D16 017E16 017F16 Register Group 2 Waveform Generating Control Register 0 Group 2 Waveform Generating Control Register 1 Group 2 Waveform Generating C
M32C/83 Group (M32C/83, M32C/83T) Address 018016 018116 018216 018316 018416 018516 018616 018716 018816 018916 018A16 018B16 018C16 018D16 018E16 018F16 019016 019116 019216 019316 019416 019516 019616 019716 019816 019916 019A16 019B16 019C16 019D16 019E16 019F16 01A016 01A116 01A216 01A316 01A416 01A516 01A616 01A716 01A816 01A916 01AA16 01AB16 01AC16 01AD16 01AE16 01AF16 Register Symbol Value after RESET XX16 Group 3 Waveform Generating Register 0 G3PO0 Group 3 Waveform Generating Register 1 G3P
M32C/83 Group (M32C/83, M32C/83T) Address 01B016 01B116 01B216 01B316 01B416 01B516 01B616 01B716 01B816 01B916 01BA16 01BB16 01BC16 01BD16 01BE16 01BF16 01C016 01C116 01C216 01C316 01C416 01C516 01C616 01C716 01C816 01C916 01CA16 01CB16 01CC16 01CD16 01CE16 01CF16 01D016 01D116 01D216 01D316 01D416 01D516 01D616 01D716 01D816 01D916 01DA16 01DB16 01DC16 01DD16 01DE16 01DF16 Register Symbol Value after RESET XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 A/D1 Register
M32C/83 Group (M32C/83, M32C/83T) Address 01E016 01E116 01E216 01E316 01E416 01E516 01E616 01E716 01E816 01E916 01EA16 01EB16 01EC16 01ED16 01EE16 01EF16 01F016 01F116 01F216 01F316 01F416 01F516 01F616 01F716 01F816 01F916 01FA16 01FB16 01FC16 01FD16 01FE16 01FF16 020016 020116 020216 020316 020416 020516 020616 020716 020816 020916 020A16 020B16 020C16 020D16 020E16 020F16 Register CAN0 Message Slot Buffer 0 Standard ID0 CAN0 Message Slot Buffer 0 Standard ID1 CAN0 Message Slot Buffer 0 Extended ID0 CAN
M32C/83 Group (M32C/83, M32C/83T) Address 021016 021116 021216 021316 021416 021516 021616 021716 021816 021916 021A16 021B16 021C16 021D16 021E16 021F16 022016 022116 022216 022316 022416 022516 022616 022716 022816 022916 022A16 022B16 022C16 022D16 022E16 022F16 023016 023116 023216 023316 023416 023516 023616 023716 023816 Register Symbol Value after RESET 0016(2) 0016(2) CAN0 Slot Interrupt Mask Register C0SIMKR CAN0 Error Interrupt Mask Register CAN0 Error Interrupt Status Register C0EIMKR C0E
M32C/83 Group (M32C/83, M32C/83T) Address 023916 023A16 023B16 023C16 023D16 023E16 023F16 024016 024116 024216 024316 024416 024516 024616 024716 024816 024916 024A16 024B16 024C16 024D16 024E16 024F16 025016 025116 025216 025316 025416 025516 025616 025716 025816 025916 025A16 025B16 025C16 025D16 025E16 025F16 026016 026116 to 02BF16 Register CAN0 Message Slot 9 Control Register / CAN0 Local Mask Register B Standard ID1 CAN0 Message Slot 10 Control Register / CAN0 Local Mask Register B Extended ID0 CAN
M32C/83 Group (M32C/83, M32C/83T) Address 02C016 02C116 02C216 02C316 02C416 02C516 02C616 02C716 02C816 02C916 02CA16 02CB16 02CC16 02CD16 02CE16 02CF16 02D016 02D116 02D216 02D316 02D416 02D516 02D616 02D716 02D816 02D916 02DA16 02DB16 02DC16 02DD16 02DE16 02DF16 02E016 02E116 02E216 02E316 02E416 02E516 02E616 02E716 02E816 02E916 02EA16 02EB16 02EC16 02ED16 02EE16 02EF16 Register Symbol X0 Register Y0 Register X0R,Y0R X1 Register Y1 Register X1R,Y1R X2 Register Y2 Register X2R,Y2R X3 Register
M32C/83 Group (M32C/83, M32C/83T) Address 02F016 02F116 02F216 02F316 02F416 02F516 02F616 02F716 02F816 02F916 02FA16 02FB16 02FC16 02FD16 02FE16 02FF16 030016 030116 030216 030316 030416 030516 030616 030716 030816 030916 030A16 030B16 030C16 030D16 030E16 030F16 031016 031116 031216 031316 031416 031516 031616 031716 031816 031916 031A16 031B16 031C16 031D16 031E16 031F16 Register Symbol Value after RESET UART4 Special Mode Register 4 UART4 Special Mode Register 3 UART4 Special Mode Register 2 UART4
M32C/83 Group (M32C/83, M32C/83T) Address Register 032016 032116 032216 032316 032416 UART3 Special Mode Register 4 032516 032616 032716 032816 032916 032A16 032B16 032C16 032D16 032E16 032F16 033016 033116 033216 033316 033416 033516 033616 033716 033816 033916 033A16 033B16 033C16 033D16 033E16 033F16 034016 034116 034216 034316 034416 034516 034616 034716 034816 034916 034A16 034B16 034C16 034D16 034E16 034F16 Symbol Value after RESET U3SMR4 0016 UART3 Special Mode Register 3 UART3 Special Mode Reg
M32C/83 Group (M32C/83, M32C/83T) Address Register 035016 Timer B0 Register 035116 035216 Timer B1 Register 035316 035416 Timer B2 Register 035516 035616 Timer A0 Mode Register 035716 Timer A1 Mode Register 035816 Timer A2 Mode Register 035916 Timer A3 Mode Register 035A16 Timer A4 Mode Register 035B16 Timer B0 Mode Register 035C16 Timer B1 Mode register 035D16 Timer B2 Mode Register 035E16 Timer B2 Special Mode Register 035F16 Count Source Prescaler Register(1) 036016 036116 036216 036316 036416 UART0 Spe
M32C/83 Group (M32C/83, M32C/83T) Address 038016 038116 038216 038316 038416 038516 038616 038716 038816 038916 038A16 038B16 038C16 038D16 038E16 038F16 039016 039116 039216 039316 039416 039516 039616 039716 039816 039916 039A16 039B16 039C16 039D16 039E16 039F16 Register Symbol Value after RESET XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 A/D0 Register 0 AD00 A/D0 Register 1 AD01 A/D0 Register 2 AD02 A/D0 Register 3 AD03 A/D0 Register 4 AD04 A/D0 Registe
M32C/83 Group (M32C/83, M32C/83T) <144-pin package> Address 03A016 03A116 03A216 03A316 03A416 03A516 03A616 03A716 03A816 03A916 03AA16 03AB16 03AC16 03AD16 03AE16 03AF16 03B016 03B116 03B216 03B316 03B416 03B516 03B616 03B716 03B816 03B916 03BA16 03BB16 03BC16 03BD16 03BE16 03BF16 03C016 03C116 03C216 03C316 03C416 03C516 03C616 03C716 03C816 03C916 03CA16 03CB16 03CC16 03CD16 03CE16 03CF16 Register Function Select Register A8 Function Select Register A9 Symbol PS8 PS9 Value after RESET X000 00002 001
M32C/83 Group (M32C/83, M32C/83T) <144-pin package> Address 03D016 03D116 03D216 03D316 03D416 03D516 03D616 03D716 03D816 03D916 03DA16 03DB16 03DC16 03DD16 03DE16 03DF16 03E016 03E116 03E216 03E316 03E416 03E516 03E616 03E716 03E816 03E916 03EA16 03EB16 03EC16 03ED16 03EE16 03EF16 03F016 03F116 03F216 03F316 03F416 03F516 03F616 03F716 03F816 03F916 03FA16 03FB16 03FC16 03FD16 03FE16 03FF16 Register Port P14 Register Port P15 Register Port P14 Direction Register Port P15 Direction Register Symbol P14 P
M32C/83 Group (M32C/83, M32C/83T) <100-pin package> 12345678901234567890123456789012123456789012345678901234 12345678901234567890123456789012123456789012345678901234 12345678901234567890123456789012123456789012345678901234 12345678901234567890123456789012123456789012345678901234 Address Register Symbol Value after RESET 03A016 (Note 2) 03A116 03A216 03A316 03A416 03A516 03A616 03A716 03A816 03A916 03AA16 03AB16 03AC16 03AD16 03AE16 03AF16 Function Select Register C PSC 0X00 00002 03B016 Function Select R
M32C/83 Group (M32C/83, M32C/83T) <100-pin package> 12345678901234567890123456789012123456789012345678901234 12345678901234567890123456789012123456789012345678901234 12345678901234567890123456789012123456789012345678901234 12345678901234567890123456789012123456789012345678901234 Address Register Symbol Value after RESET 03D016 (Note 3) 03D116 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 123456789012345678901234567890121234
M32C/83 Group (M32C/83, M32C/83T) 5. Electrical Characteristics 5.1 Electrical Characteristics (M32C/83) Table 5.1 Absolute Maximum Ratings Symbol VCC Parameter Supply Voltage AVCC Analog Supply Voltage VI Input Voltage Condition Value Unit VCC=AVCC -0.3 to 6.0 V VCC=AVCC RESET, CNVSS, BYTE, P00-P07, P10-P17, P20-P27, P30-P37, P40-P47, P50-P57, P60-P67, P72-P77, P80- -0.3 to 6.0 V -0.3 to VCC+0.3 V -0.3 to 6.0 V -0.3 to VCC+0.
M32C/83 Group (M32C/83, M32C/83T) Table 5.2 Recommended Operating Conditions (VCC = 3.0V to 5.5V at Topr = – 20 to 85oC) Symbol VCC AVCC VSS AVSS VIH VIL IOH(peak) Parameter Standard Supply Voltage (Through VDC) Supply Voltage (Not through VDC) Analog Supply Voltage Supply Voltage Analog Supply Voltage Input High ("H") P20-P27, P30-P37, P40-P47, P50-P57, P60-P67, P72-P77, P80Voltage P87(3), P90-P97, P100-P107, P110-P114, P120-P127, P130- Input Low ("L") Voltage Peak Output High ("H") Min 3.0 3.
M32C/83 Group (M32C/83, M32C/83T) VCC=5V Table 5.3 Electrical Characteristics (VCC=4.2 to 5.5V, VSS=0V at Topr= –20 to 85oC, f(XIN)=32MHZ unless otherwise specified) Symbol VOH VOL Parameter Output High ("H") Voltage Output Low ("L") Voltage Hysteresis Standard Unit IOH=-5mA Min Typ Vcc - 2.0 P130-P137, P140-P146, P150-P157(1) P00-P07, P10-P17, P20-P27, P30-P37, P40-P47, IOH=-200µA Vcc - 0.
M32C/83 Group (M32C/83, M32C/83T) VCC=5V Table 5.4 A/D Conversion Characteristics (VCC = AVCC = VREF = 4.2 to 5.
M32C/83 Group (M32C/83, M32C/83T) VCC=5V Timing Requirements (VCC = 4.2 to 5.5V, VSS = 0V at Topr = –20 to 85oC unless otherwise specified) Table 5.7 External Clock Input Symbol Parameter Standard Min Unit Max tc External Clock Input Cycle Time 33 ns tw(H) External Clock Input High ("H") Pulse Width 13 ns tw(L) External Clock Input Low ("L") Pulse Width 13 ns tr External Clock Rise Time 5 ns tf External Clock Fall Time 5 ns Table 5.
M32C/83 Group (M32C/83, M32C/83T) VCC=5V Timing Requirements (VCC = 4.2 to 5.5V, VSS = 0V at Topr = –20 to 85oC unless otherwise specified) Table 5.9 Timer A Input (Count Source Input in Event Counter Mode) Symbol Parameter Standard Min Unit Max tc(TA) TAiIN Input Cycle Time tw(TAH) TAiIN Input High ("H") Pulse Width 40 ns tw(TAL) TAiIN Input Low ("L") Pulse Width 40 ns 100 ns Table 5.
M32C/83 Group (M32C/83, M32C/83T) VCC=5V Timing Requirements (VCC = 4.2 to 5.5V, VSS = 0V at Topr = –20 to 85oC unless otherwise specified) Table 5.
M32C/83 Group (M32C/83, M32C/83T) VCC=5V Switching Characteristics (VCC = 4.2 to 5.5V, VSS = 0V at Topr = –20 to 85oC unless otherwise specified) Table 5.
M32C/83 Group (M32C/83, M32C/83T) VCC=5V Switching Characteristics (VCC = 4.2 to 5.5V, VSS = 0V at Topr = –20 to 85oC unless otherwise specified) Table 5.
M32C/83 Group (M32C/83, M32C/83T) VCC=5V Switching Characteristics (VCC = 4.2 to 5.5V, VSS = 0V at Topr = –20 to 85oC unless otherwise specified) Table 5.
M32C/83 Group (M32C/83, M32C/83T) VCC=5V Switching Characteristics (VCC = 4.2 to 5.5V, VSS = 0V at Topr = –20 to 85oC unless otherwise specified) Table 5.
M32C/83 Group (M32C/83, M32C/83T) P0 P1 P2 P3 P4 P5 P6 P7 30pF P8 P9 P10 P11 P12 P13 Note 1 P14 P15 NOTES: 1. P11 to P15 are provided in the 144-pin package only. Figure 5.1 P0 to P15 Measurement Circuit Rev. 1.41 Jan.
M32C/83 Group (M32C/83, M32C/83T) Vcc=5V Memory Expansion Mode and Microprocessor Mode (with no wait state) Read Timing BCLK td(BCLK-ALE) 18ns.max th(BCLK-ALE) -2ns.min ALE td(BCLK-CS) th(BCLK-CS) 18ns.max(1) -3ns.min CSi th(RD-CS) tcyc 0ns.min td(BCLK-AD) th(BCLK-AD) 18ns.max(1) -3ns.min ADi BHE td(BCLK-RD) 18ns.max th(RD-AD) 0ns.min RD th(BCLK-RD) tac1(RD-DB)(2) -5ns.min tac1(AD-DB)(2) Hi-Z DB tsu(DB-BCLK) th(RD-DB) 26ns.min(1) 0ns.min NOTES: 1.
M32C/83 Group (M32C/83, M32C/83T) Vcc=5V Memory Expansion Mode and Microprocessor Mode (with a wait state) Read Timing BCLK 18ns.max td(BCLK-ALE) th(BCLK-ALE) -2ns.min ALE th(BCLK-CS) td(BCLK-CS) -3ns.min 18ns.max(1) CSi th(RD-CS) tcyc 0ns.min td(BCLK-AD) ADi BHE th(BCLK-AD) 18ns.max(1) -3ns.min td(BCLK-RD) 18ns.max th(RD-AD) 0ns.min RD th(BCLK-RD) tac2(RD-DB)(2) -5ns.min tac2(AD-DB)(2) DB Hi-Z tsu(DB-BCLK) 26ns.min(1) th(RD-DB) 0ns.min Notes : 1.
M32C/83 Group (M32C/83, M32C/83T) Vcc=5V Memory Expansion Mode and Microprocessor Mode (with a wait state, when accessing an external memory and using the multiplexed bus) Read Timing BCLK 18ns.max th(BCLK-ALE) td(BCLK-ALE) -2ns.min ALE th(BCLK-CS) tcyc td(BCLK-CS) -3ns.min 18ns.max th(RD-CS)(1) CSi td(AD-ALE)(1) ADi /DBi th(ALE-AD)(1) Address Data input tdz(RD-AD) 8ns.max tsu(DB-BCLK) td(BCLK-AD) ADi BHE tac3(AD-DB)(1) td(BCLK-RD) th(BCLK-RD) 18ns.max 0ns.min 26ns.
M32C/83 Group (M32C/83, M32C/83T) Memory Expansion Mode and Microprocessor Mode (When accessing the DRAM area) Read Timing BCLK tcyc td(BCLK-RAD) th(BCLK-RAD) 18ns.max -3ns.min MAi td(BCLK-CAD) th(BCLK-CAD) 18ns.max(1) -3ns.min Column address Row address th(RAS-RAD)(2) tRP(2) RAS td(BCLK-RAS) CASL CASH 18ns.max(1) td(BCLK-CAS) 18ns.max(1) th(BCLK-RAS) -3ns.min th(BCLK-CAS) -3ns.min DW tac4(CAS-DB)(2) tac4(CAD-DB)(2) tac4(RAS-DB)(2) Hi-Z DB tsu(DB-BCLK) 26ns.min(1) th(CAS-DB) 0ns.
M32C/83 Group (M32C/83, M32C/83T) Memory Expansion Mode and Microprocessor Mode Vcc=5V (When accessing the DRAM area) Write Timing BCLK tcyc td(BCLK-RAD) 18ns.max MAi th(BCLK-RAD) -3ns.min td(BCLK-CAD) th(BCLK-CAD) 18ns.max -3ns.min Column address Row address th(RAS-RAD)(1) tRP(1) RAS td(BCLK-RAS) 18ns.max td(BCLK-CAS) 18ns.max CASL CASH th(BCLK-RAS) -3ns.min th(BCLK-CAS) td(BCLK-DW) -3ns.min 18ns.max DW th(BCLK-DW) tsu(DB-CAS)(1) DB -5ns.min Hi-Z th(BCLK-DB) -7ns.min NOTES: 1.
M32C/83 Group (M32C/83, M32C/83T) Memory Expansion Mode and Microprocessor Mode Refresh Timing (CAS-before-RAS refresh) Vcc=5V BCLK td(BCLK-RAS) tcyc 18ns.max RAS th(BCLK-RAS) tsu(CAS-RAS)(1) CASL CASH -3ns.min td(BCLK-CAS) th(BCLK-CAS) -3ns.min 18ns.max DW NOTES : 1. Varies with operation frequency: tsu(CAS-RAS)=(tcyc/2-13)ns.min Refresh Timing (Self-refresh) BCLK td(BCLK-RAS) tcyc 18ns.max RAS th(BCLK-RAS) tsu(CAS-RAS)(2) CASL CASH td(BCLK-CAS) 18ns.max DW NOTES: 2.
M32C/83 Group (M32C/83, M32C/83T) Vcc=5V tc(TA) tw(TAH) TAiIN input tw(TAL) tc(UP) tw(UPH) TAiOUT input tw(UPL) TAiOUT input (Counter increment/ decrement input) In event counter mode TAiIN input (When counting on the falling edge) th(TIN–UP) tsu(UP–TIN) TAiIN input (When counting on the rising edge) tc(TB) tw(TBH) TBiIN input tw(TBL) tc(AD) tw(ADL) ADTRG input tc(CK) tw(CKH) CLKi tw(CKL) th(C–Q) TxDi td(C–Q) tsu(D–C) th(C–D) RxDi tw(INL) INTi input tw(INH) NMI input 2 clock cycles + 300ns ore
M32C/83 Group (M32C/83, M32C/83T) Vcc=5V Memory Expansion Mode and Microprocessor Mode (Valid only with a wait state) BCLK RD (Separate bus) WR, WRL, WRH (Separate bus) RD (Multiplexed bus) WR, WRL, WRH (Multiplexed bus) RDY input th(BCLK–RDY) tsu(RDY–BCLK) (Valid with a wait state or with no wait state) BCLK tsu(HOLD–BCLK) th(BCLK–HOLD) HOLD input HLDA output td(BCLK–HLDA) P0, P1, P2, P3, P4, P50 to P52 td(BCLK–HLDA) Hi–Z Measurement Conditions: • VCC=4.2 to 5.
M32C/83 Group (M32C/83, M32C/83T) VCC=3.3V Table 5.24 Electrical Characteristics (VCC=3.0 to 3.6V, VSS=0V at Topr = –20 to f(XIN)=20MHZ unless otherwise specified) Symbol VOH V OL VT+-VT- I IH Parameter Output High ("H") Voltage Output Low ("L") Voltage Hysteresis IOH=-1mA IOH=-0.1mA XCOUT No load applied P00-P07, P10-P17, P20-P27, P30-P37, P40-P47, P50-P57, P60-P67, P70-P77, P80-P84, P86, P87, IOL=1mA P90-P97, P100-P107, P110-P114, P120-P127, P130-P137, P140-P146, P150-P157(1) XOUT IOL=0.
M32C/83 Group (M32C/83, M32C/83T) VCC=3.3V Table 5.25 A/D Conversion Characteristics (VCC = AVCC = VREF = 3.0 to 3.6V, at Topr = –20 to 85oC, f(XIN) = 20MHZ unless otherwise specified) Symbol INL Resolution Standard Min Typ Unit Max VREF=VCC Integral Nonlinearity Error DNL Measurement Condition Parameter VSS = AVSS = 0V No S&H function (8-bit) VCC=VREF=3.
M32C/83 Group (M32C/83, M32C/83T) VCC=3.3V Timing Requirements (VCC = 3.0 to 3.6V, VSS = 0V at Topr = –20 to 85oC unless otherwise specified) Table 5.28 External Clock Input Symbol Parameter Standard Min Unit Max tc External Clock Input Cycle Time 50 ns tw(H) External Clock Input High ("H") Pulse Width 22 ns tw(L) External Clock Input Low ("L") Pulse Width 22 tr External Clock Rise Time 5 ns tf External Clock Fall Time 5 ns ns Table 5.
M32C/83 Group (M32C/83, M32C/83T) VCC=3.3V Timing Requirements (VCC = 3.0 to 3.6V, VSS = 0V at Topr = –20 to 85oC unless otherwise specified) Table 5.30 Timer A Input (Count Source Input in Event Counter Mode) Symbol Parameter Standard Min Unit Max tc(TA) TAiIN Input Cycle Time 100 ns tw(TAH) TAiIN Input High ("H") Pulse Width 40 ns tw(TAL) TAiIN Input Low ("L") Pulse Width 40 ns Table 5.
M32C/83 Group (M32C/83, M32C/83T) VCC=3.3V Timing Requirements (VCC = 3.0 to 3.6V, VSS = 0V at Topr = –20 to 85oC unless otherwise specified) Table 5.
M32C/83 Group (M32C/83, M32C/83T) VCC=3.3V Switching Characteristics (VCC = 3.0 to 3.6V, VSS = 0V at Topr = –20 to 85oC, unless otherwise specified) Table 5.
M32C/83 Group (M32C/83, M32C/83T) VCC=3.3V Switching Characteristics (VCC = 3.0 to 3.6V, VSS = 0V at Topr = –20 to 85oC unless otherwise specified) Table 5.
M32C/83 Group (M32C/83, M32C/83T) VCC=3.3V Switching Characteristics (VCC = 3.0 to 3.6V, VSS = 0V at Topr = –20 to 85oC unless otherwise specified) Table 5.
M32C/83 Group (M32C/83, M32C/83T) VCC=3.3V Switching Characteristics (VCC = 3.0 to 3.6V, VSS = 0V at Topr = –20 to 85oC unless otherwise specified) Table 5.
M32C/83 Group (M32C/83, M32C/83T) Vcc=3.3V Memory Expansion Mode and Microprocessor Mode (with no wait state) Read Timing BCLK td(BCLK-ALE) th(BCLK-ALE) 18ns.max -2ns.min ALE th(BCLK-CS) td(BCLK-CS) 0ns.min 18ns.max(1) CSi th(RD-CS) tcyc 0ns.min td(BCLK-AD) th(BCLK-AD) 18ns.max(1) 0ns.min ADi BHE th(RD-AD) 0ns.min td(BCLK-RD) 18ns.max RD tac2(RD-DB)(2) th(BCLK-RD) -3ns.min tac2(AD-DB) (2) Hi-Z DB tsu(DB-BCLK) th(RD-DB) 30ns.min(1) 0ns.min NOTES: 1.
M32C/83 Group (M32C/83, M32C/83T) Vcc=3.3V Memory Expansion Mode and Microprocessor Mode (with a wait state) Read Timing BCLK 18ns.max td(BCLK-ALE) th(BCLK-ALE) -2ns.min ALE td(BCLK-CS) th(BCLK-CS) 18ns.max(1) 0ns.min CSi th(RD-CS) tcyc 0ns.min th(BCLK-AD) td(BCLK-AD) ADi BHE 18ns.max(1) 0ns.min td(BCLK-RD) 18ns.max th(RD-AD) 0ns.min RD th(BCLK-RD) tac2(RD-DB)(2) -3ns.min tac2(AD-DB)(2) DB Hi-Z tsu(DB-BCLK) 30ns.min(1) th(RD-DB) 0ns.min NOTES: 1.
M32C/83 Group (M32C/83, M32C/83T) Vcc=3.3V Memory Expansion Mode and Microprocessor Mode (with a wait state, when accessing an external memory and using the multiplexed bus) Read Timing BCLK td(BCLK-ALE) th(BCLK-ALE) 18ns.max -2ns.min ALE th(BCLK-CS) tcyc td(BCLK-CS) 0ns.min 18ns.max h(RD-CS)(1) t CSi td(AD-ALE)(1) ADi /DBi th(ALE-AD)(1) Address th(RD-DB) 8ns.max tsu(DB-BCLK) td(BCLK-AD) ADi BHE tac3(RD-DB) td(BCLK-RD) tac3(AD-DB)(1) 0ns.min th(BCLK-AD) 30ns.min (1) 18ns.
M32C/83 Group (M32C/83, M32C/83T) Vcc=3.3V Memory Expansion Mode and Microprocessor Mode (With 2 wait states, when accessing the DRAM area) Read Timing BCLK tcyc td(BCLK-RAD) th(BCLK-RAD) 18ns.max(1) MAi td(BCLK-CAD) th(BCLK-CAD) 18ns.max(1) 0ns.min 0ns.min Column address Row address tRP(2) th(RAS-RAD)(1) RAS td(BCLK-RAS) 18ns.max(1) th(BCLK-RAS) td(BCLK-CAS) 0ns.min 18ns.max(1) CASL CASH th(BCLK-CAS) 0ns.
M32C/83 Group (M32C/83, M32C/83T) Vcc=3.3V Memory Expansion Mode and Microprocessor Mode (With 2 wait states, when accessing the DRAM area) Write Timing BCLK tcyc td(BCLK-RAD) 18ns.max th(BCLK-RAD) 0ns.min MAi td(BCLK-CAD) th(BCLK-CAD) 18ns.max Row address 0ns.min Column address tRP(1) th(RAS-RAD)(1) RAS td(BCLK-RAS) td(BCLK-CAS) 18ns.max CASL CASH 18ns.max th(BCLK-RAS) 0ns.min th(BCLK-CAS) td(BCLK-DW) 0ns.min 18ns.max DW th(BCLK-DW) tsu(DB-CAS)(1) DB -3ns.
M32C/83 Group (M32C/83, M32C/83T) Vcc=3.3V Memory Expansion Mode and Microprocessor Mode Refresh Timing (CAS-before-RAS refresh) BCLK td(BCLK-RAS) tcyc 18ns.max RAS th(BCLK-RAS) tsu(CAS-RAS)(1) CASL CASH 0ns.min td(BCLK-CAS) th(BCLK-CAS) 0ns.min 18ns.max DW NOTES: 1. Varies with operation frequency. tsu(CAS-RAS)=(tcyc/2-13)ns.min Refresh Timing (Self-refresh) BCLK td(BCLK-RAS) tcyc 18ns.max RAS tsu(CAS-RAS)(1) CASL CASH td(BCLK-CAS) 18ns.max DW NOTES: 1. Varies with operation frequency.
M32C/83 Group (M32C/83, M32C/83T) Vcc=3.
M32C/83 Group (M32C/83, M32C/83T) Vcc=3.3V Memory Expansion Mode and Microprocessor Mode (Valid only with a wait state) BCLK RD (Separate bus) WR, WRL, WRH (Separate bus) RD (Multiplexed bus) WR, WRL, WRH (Multiplexed bus) RDY input tsu(RDY–BCLK) (Valid with a wait state and no wait state) BCLK tsu(HOLD–BCLK) th(BCLK–HOLD) HOLD input HLDA output td(BCLK–HLDA) td(BCLK–HLDA) P0, P1, P2, P3, P4, P50 to P52 Hi–Z Measurement Conditions: • VCC=3.0 to 3.6V • Input high and low voltage: VIH=2.4V, VIL=0.
M32C/83 Group (M32C/83, M32C/83T) 5.2 Electrical Characteristics (M32C/83T) Table 5.45 Absolute Maximum Ratings Symbol Parameter Condition Value Unit VCC Supply Voltage VCC=AVCC -0.3 to 6.0 V AVCC Analog Supply Voltage VCC=AVCC -0.3 to 6.0 V VI Input Voltage -0.3 to VCC+0.
M32C/83 Group (M32C/83, M32C/83T) Table 5.46 Recommended Operating Conditions (VCC=4.2 to 5.5V, VSS=0V at Topr = -40 to 85oC (T version) unless otherwise specified) Symbol Parameter VCC AVCC Supply Voltage Analog Supply Voltage VSS Supply Voltage AVSS Analog Supply Voltage Input High ("H") Voltage VIL Input Low ("L") Voltage IOH(avg) IOL(peak) IOL(avg) f(XIN) f(XCIN) Typ. 5.0 VCC Max. 5.5 0 VIH IOH(peak) Standard Min. 4.
M32C/83 Group (M32C/83, M32C/83T) VCC=5V Table 5.47 Electrical Characteristics (VCC = 4.2 to 5.5 V, VSS = 0V at Topr = –40 to 85oC(T version), f(XIN)=32MHZ unless otherwise specified) Symbol VOH Parameter Output High ("H") Voltage Condition P00-P07, P10-P17, P20-P27, P30-P37, P40-P47, IOH=-5mA P50-P57, P60-P67, P72-P77, P80-P84, P86, Standard Min VCC-2.
M32C/83 Group (M32C/83, M32C/83T) VCC=5V Table 5.48 A/D Conversion Characteristics (VCC = AVCC = VREF = 4.2 to 5.
M32C/83 Group (M32C/83, M32C/83T) Timing Requirements (VCC = 4.2 to 5.5V, VSS = 0V at Topr = –40 to 85oC (T version) unless otherwise specified) VCC=5V Table 5.51 External Clock Input Symbol Parameter Standard Min Unit M ax tc External Clock Input Cycle Time 33 ns tw(H) External Clock Input High ("H") Pulse Width 13 ns 13 tw(L) External Clock Input Low ("L") Pulse Width tr External Clock Rise Time 5 ns tf External Clock Fall Time 5 ns Rev. 1.41 Jan.
M32C/83 Group (M32C/83, M32C/83T) VCC=5V Timing Requirements (VCC = 4.2 to 5.5V, VSS = 0V at Topr = –40 to 85oC (T version) unless otherwise specified) Table 5.52 Timer A Input (Count Source Input in Event Counter Mode) Symbol Parameter Standard Min Unit Max tc(TA) TAiIN Input Cycle Time 100 ns tw(TAH) TAiIN Input High ("H") Pulse Width 40 ns tw(TAL) TAiIN Input Low ("L") Pulse Width 40 ns Table 5.
M32C/83 Group (M32C/83, M32C/83T) Timing Requirements (VCC = 4.2 to 5.5V, VSS = 0V at Topr = –40 to 85oC (T version) unless otherwise specified) Table 5.
M32C/83 Group (M32C/83, M32C/83T) P0 P1 P2 P3 P4 P5 P6 P7 30pF P8 P9 P10 P11 P12 P13 Note 1 P14 P15 NOTES: 1. P11 to P15 are provided in the 144-pin package only. Figure 5.18 P0 to P15 Measurement Circuit Rev. 1.41 Jan.
M32C/83 Group (M32C/83, M32C/83T) Vcc=5V tc(TA) tw(TAH) TAiIN input tw(TAL) tc(UP) tw(UPH) TAiOUT input tw(UPL) TAiOUT input (Counter increment/ decrement input) In event counter mode TAiIN input (When counting on the falling edge) th(TIN–UP) tsu(UP–TIN) TAiIN input (When counting on the rising edge) tc(TB) tw(TBH) TBiIN input tw(TBL) tc(AD) tw(ADL) ADTRG input tc(CK) tw(CKH) CLKi tw(CKL) th(C–Q) TxDi td(C–Q) tsu(D–C) th(C–D) RxDi tw(INL) INTi input tw(INH) NMI input 2 clock cycles + 300ns or m
M32C/83 Group (M32C/83, M32C/83T) Package Dimensions PLQ0144KA-A (144P6Q-A) JEITA Package Code P-LQFP144-20x20-0.50 Plastic 144pin 20 X 20 mm body LQFP RENESAS Code PLQP0144KA-A Previous Code 144P6Q-A / FP-144L / FP-144LV MASS[Typ.] 1.2g HD *1 D 108 73 109 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
M32C/83 Group (M32C/83, M32C/83T) PLQP0100KB-A (100P6Q-A) JEITA Package Code P-LQFP100-14x14-0.50 Plastic 100pin 14 X 14 mm body LQFP RENESAS Code PLQP0100KB-A Previous Code 100P6Q-A / FP-100U / FP-100UV MASS[Typ.] 0.6g HD *1 D 51 75 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
REVISION HISTORY Rev. Date Page 1.10 1.20 2003-9 2003-12 1.30 1.41 2004-06 2006-01 M32C/83 GROUP (M32C/83, M32C/83T) Datasheet Description Summary - New Document Maximum operating frequency changed from 30 MHz to 32 MHz. Overview, Electrical Characteristics Table 1.1 M32C/83 Group Performance (144-Pin Package) Table 1.2 M32C/83 Group Performance (100-Pin Package) Table 5.2 Recommended Operating Conditions Table 5.
REVISION HISTORY Rev. Date Page 72 79 81-89 M32C/83 GROUP (M32C/83, M32C/83T) Datasheet Description Summary • Table 5.44 Memory Expansion Mode and Microprocessor Mode Symbols for Row Address Output Delay Time and for Row Address Output Hold Time (BCLK standard) modified _______ • Figure 5.8 VCC=3.3 V Timing Diagram (7) Timing for NMI input added • 5.
Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage.
