Datasheet

M16C/6S Group Timer A
R01DS0201EJ0502 Rev.5.02 page 86 of 203
Dec 25, 2012
NOTES:
1. No matter how this bit is set, timer A4 always operates in x4 processing mode.
2. If two-phase pulse signal processing is desired, following register settings are required:
• Set the TAiP bit in the UDF register to “1” (two-phase pulse signal processing function enabled).
• Set the TAiTGH and TAiTGL bits in the TRGSR register to “00b” (TAiIN pin input).
•
Set
t
h
e
po
r
t
d
ir
ect
i
o
n
b
i
ts
f
o
r TAiIN
a
n
d
TAi
OU
T
to
“
0
”
(
in
put
m
ode)
.
Timer Ai Mode Register (i=4)
(When Using Two-Phase Pulse Signal Processing)
Symbol Address After Reset
TA4MR 039Ah 00h
b6 b5 b4 b3 b2 b1 b0
Operation Mode Select Bit
0 1 : Event counter mode
b1 b0
TMOD1
TMOD0
MR0
To use two-phase pulse signal processing, set this bit to “0”.
MR2
MR1
MR3
TCK1
TCK0
010
Bit Name
Function
RW
Count Operation Type
Select Bit
Two-Phase Pulse Signal
Processing Operation
Select Bit
(1, 2)
0 : Reload type
1 : Free-run type
0 : Normal processing operation
1 : Multiply-by-4 processing operation
001
RW
RW
RW
RW
RW
RW
RW
RW
To use two-phase pulse signal processing, set this bit to “0”.
To use two-phase pulse signal processing, set this bit to “1”.
To use two-phase pulse signal processing, set this bit to “0”.
b7
Bit Symbol
Figure 1.12.8. TA4MR Registers in Event Counter Mode (when using two-phase pulse signal
processing with timer A4)