Datasheet

M16C/6S Group Timer A
R01DS0201EJ0502 Rev.5.02 page 83 of 203
Dec 25, 2012
Item Specification
Count source • External signals input to TAiIN pin (i=0 to 4) (effective edge can be selected
in program)
timer Aj (j=i-1, except j=4 if i=0) overflows or underflows,
timer Ak (k=i+1, except k=0 if i=4) overflows or underflows
Count operation Up-count or down-count can be selected by external signal or program
When the timer overflows or underflows, it reloads the reload register con-
tents and continues counting. When operating in free-running mode, the
timer continues counting without reloading.
Divided ratio 1/ (FFFF16 - n + 1) for up-count
1/ (n + 1) for down-count n : set value of TAi register 000016 to FFFF16
Count start condition Set TAiS bit of TABSR register to “1” (= start counting)
Count stop condition Set TAiS bit to “0” (= stop counting)
Interrupt request generation timing
Timer overflow or underflow
TAiIN pin function I/O port or count source input i2, 3
TAiOUT pin function I/O port, pulse output, or up/down-count select input
Read from timer Count value can be read by reading TAi register
Write to timer
• When not counting and until the 1st count source is input after counting start
Value written to TAi register is written to both reload register and counter
• When counting (after 1st count source input)
Value written to TAi register is written to only reload register
(Transferred to counter when reloaded next)
Select function Free-run count function
Even when the timer overflows or underflows, the reload register content is
not reloaded to it
Pulse output function
Whenever the timer underflows or underflows, the output polarity of TAiOUT
pin is inverted . When not counting, the pin outputs a low.
2. Event Counter Mode
In event counter mode, the timer counts pulses from an external device or overflows and underflows of
other timers. Timer A4 can count two-phase external signals. Table 1.12.2 lists specifications in event
counter mode (when not processing two-phase pulse signal). Table 1.12.3 lists specifications in event
counter mode (when processing two-phase pulse signal with the timer A4). Figure 1.12.7 shows TAiMR
register in event counter mode (when not processing two-phase pulse signal). Figure 1.12.8 shows
TA4MR registers in event counter mode (when processing two-phase pulse signal with the timer A4).
Table 1.12.2. Specifications in Event Counter Mode (when not processing two-phase pulse signal)