Datasheet

M16C/6S Group Timers
R01DS0201EJ0502 Rev.5.02 page 78 of 203
Dec 25, 2012
Timers
Five 16-bit timers, each capable of operating independently of the others. The count source for each timer
acts as a clock, to control such timer operations as counting, reloading, etc. Figures 1.12.1 show block
diagrams of timer A.
Figure 1.12.1. Timer A Configuration
1/8
1/4
f1 or f2
f8
f32
• Main clock
• On-chip oscillator
clock
NOTES :
1. Be aware that TA0IN shares the pin with RXD2.
1/2
f1
f2
PCLK0 bit = 0
PCLK0 bit =
1
00: Timer mode
10: One-shot timer mode
11: PWM mode
01: Event counter mode
TA0IN
TA1IN
TA2IN
TA3IN
TA4IN
Timer A0
Timer A1
Timer A2
Timer A3
Timer A4
Timer A0 interrupt
Timer A1 interrupt
Timer A2 interrupt
Timer A3 interrupt
Timer A4 interrupt
Noise
filter
Noise
filter
Noise
filter
Noise
filter
Noise
filter
00
01
10
11
TCK1 to TCK0
00: Timer mode
10: One-shot tiemr mode
11: PWM mode
00: Timer mode
10: One-shot timer mode
11: PWM mode
00: Timer mode
10: One-shot timer mode
11: PWM mode
00: Timer mode
10: One-shot timer mode
11: PWM mode
01: Event counter mode
01: Event counter mode
01: Event counter mode
01: Event counter mode
TCK1 to TCK0
TCK1 to TCK0
TCK1 to TCK0
TCK1 to TCK0
TMOD1 to TMOD0
TMOD1 to TMOD0
TMOD1 to TMOD0
TA0TGH to TA0TGL
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
00
11
10
00
11
10
00
11
10
00
11
10
00
11
10
TCK1 to TCK0, TMOD1 to TMOD0 : Bits in TAiMR register (i=0 to 4)
TAiGH to TAiGL: Bits in ONSF register and TRGSR register
TA1TGH to TA1TGL
TA2TGH to TA2TGL
TA3TGH to TA3TGL
TA4TGH to TA4TGL
TMOD1 to TMOD0
TMOD1 to TMOD0
f8 f32 fC32f1 or f2