Datasheet

M16C/6S Group Interrupts
R01DS0201EJ0502 Rev.5.02 page 52 of 203
Dec 25, 2012
Interrupt Control
The following describes how to enable/disable the maskable interrupts, and how to set the priority in which
order they are accepted. What is explained here does not apply to nonmaskable interrupts.
Use the FLG register’s I flag, IPL, and each interrupt control register’s ILVL2 to ILVL0 bits to enable/disable
the maskable interrupts. Whether an interrupt is requested is indicated by the IR bit in each interrupt control
register.
Figure 1.9.3 shows the interrupt control registers.