Datasheet

M16C/6S Group Interrupts
R01DS0201EJ0502 Rev.5.02 page 51 of 203
Dec 25, 2012
Table 1.9.2. Relocatable Vector Tables
Software interrupt
number
Reference
Note 1: Address relative to address in INTB.
Note 2: Set the IFSR register's IFSR6 and IFSR7 bits “0”.
Note 3: During I
2
C mode, NACK and ACK interrupts comprise the interrupt source.
Note 4: Set the IFSR2A register’s IFSR26 and IFSR27 bits “1”.
Note 5: These interrupts cannot be disabled using the I flag.
Vector address (Note 1)
Address (L) to address (H)
0
11
12
13
14
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
63
to
10
15
16
5
6
7
8
4
9
1 to 3
Interrupt source
BRK instruction
INT3
SI/O3, INT4
SI/O4, INT5
Timer B4, UART1 bus collision detect
(Note 2)
(Note 2)
DMA0
DMA1
UART0 transmit, NACK0
UART0 receive, ACK0
UART1 transmit, NACK1
UART1 receive, ACK1
Timer A0
Timer A1
Timer A2
Timer A3
Timer A4
INT0
INT1
INT2
Software interrupt
UART 2 bus collision detection
UART2 transmit, NACK2 (Note 3)
UART2 receive, ACK2 (Note 3)
(
Note 4)
Timer B3, UART0 bus collision detect
(
Note 4)
M16C/60, M16C/20
series software
manual
INT interrupt
Timer
Serial I/O
Serial I/O
INT interrupt
Serial I/O
DMAC
Serial I/O
Timer
INT interrupt
M16C/60, M16C/20
series software
manual
(Note 5)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
+0 to +3 (0000
16 to 000316)
+44 to +47 (002C
16 to 002F16)
+48 to +51 (0030
16 to 003316)
+52 to +55 (0034
16 to 003716)
+56 to +59 (0038
16 to 003B16)
+68 to +71 (0044
16 to 004716)
+72 to +75 (0048
16 to 004B16)
+76 to +79 (004C
16 to 004F16)
+80 to +83 (0050
16 to 005316)
+84 to +87 (0054
16 to 005716)
+88 to +91 (0058
16 to 005B16)
+92 to +95 (005C
16 to 005F16)
+96 to +99 (0060
16 to 006316)
+100 to +103 (0064
16 to 006716)
+104 to +107 (0068
16 to 006B16)
+108 to +111 (006C
16 to 006F16)
+112 to +115 (0070
16 to 007316)
+116 to +119 (0074
16 to 007716)
+120 to +123 (0078
16 to 007B16)
+124 to +127 (007C
16 to 007F16)
+128 to +131 (008016 to 008316)
+252 to +255 (00FC
16 to 00FF16)
+40 to +43 (0028
16 to 002B16)
+60 to +63 (003C
16 to 003F16)
+64 to +67 (0040
16 to 004316)
+20 to +23 (0014
16 to 001716)
+24 to +27 (001816 to 001B16)
+28 to +31 (001C
16 to 001F16)
+32 to +35 (0020
16 to 002316)
+16 to +19 (0010
16 to 001316)
+36 to +39 (0024
16 to 002716)
to
(Note 3)
(Note 3)
(Note 3)
(Note 3)
(Note 5)
• Relocatable Vector Tables
The 256 bytes beginning with the start address set in the INTB register comprise a reloacatable vector
table area. Table 1.9.2 lists the relocatable vector tables. Setting an even address in the INTB register
results in the interrupt sequence being executed faster than in the case of odd addresses.