Datasheet

M16C/6S Group Serial I/O
R01DS0201EJ0502 Rev.5.02 page 100 of 203
Dec 25, 2012
Figure 1.13.8. U0SMR4 to U2SMR4 Registers
UARTi special mode register 4 (i=0 to 2)
Symbol Address After reset
U0SMR4 to U2SMR4 036C
16 , 0370 16 , 0374 16 00 16
b7 b6 b5 b4 b3 b2 b1 b0
Bit name
Bit
symbol
RWFunction
ACKC
SCLHI
SWC9
Start condition
generate bit (Note)
Stop condition
generate bit (Note)
0 : Clear
1 : Start
SCL,SDA output
select bit
ACK data bit
Restart condition
generate bit (Note)
0 : Clear
1 : Start
0 : Clear
1 : Star
t
STAREQ
RSTAREQ
STPREQ
ACKD
0 : Start and stop conditions not output
1 : Start and stop conditions output
SCL output stop
enable bit
ACK data output
enable bit
0 : Disabled
1 : Enabled
0 : ACK
1 : NACK
0 : Serial I/O data output
1 : ACK data output
Note: Set to “0” when each condition is generated.
STSPSEL
0 : SCL “L” hold disabled
1 : SCL “L” hold enabled
SCL wait bit 3
RW
RW
RW
RW
RW
RW
RW
RW