Datasheet

M16C/62P Group (M16C/62P, M16C/62PT) 1. Overview
Rev.2.41 Jan 10, 2006 Page 5 of 96
REJ03B0001-0241
1.3 Block Diagram
Figure 1.1 is a M16C/62P Group (M16C/62P, M16C/62PT) 128-pin and 100-pin version Block Diagram,
Figure 1.2 is a M16C/62P Group (M16C/62P, M16C/62PT) 80-pin version Block Diagram.
Figure 1.1 M16C/62P Group (M16C/62P, M16C/62PT) 128-pin and 100-pin version Block Diagram
Output (timer A): 5
Input (timer B): 6
Internal peripheral functions
Watchdog timer
(15 bits)
DMAC
(2 channels)
D/A converter
(8 bits X 2 channels)
Memory
ROM
(1)
RAM
(2)
A/D converter
(10 bits X 8 channels
Expandable up to 26 channels)
UART or
clock synchronous serial I/O
(8 bits X 3 channels)
System clock
generation circuit
XIN-XOUT
XCIN-XCOUT
PLL frequency synthesizer
On-chip oscillator
M16C/60 series16-bit CPU core
Port P0
8
Port P1
8
Port P2
8 8 8 8
Port P6
8
8
R0LR0H
R1H R1L
R2
R3
A0
A1
FB
SB
ISP
USP
INTB
CRC arithmetic circuit (CCITT )
(Polynomial : X
16
+X
12
+X
5
+1)
Multiplier
7 8 8
Port P10
Port P9
Port P8_5Port P8
Port P7
NOTES :
1. ROM size depends on microcomputer type.
2. RAM size depends on microcomputer type.
3. Ports P11 to P14 exist only in 128-pin version.
4. Use M16C/62PT on VCC1= VCC2.
Port P5
Port P4Port P3
Clock synchronous serial I/O
(8 bits X 2 channels)
PC
FLG
Timer (16-bit)
Three-phase motor
control circuit
8 8 82
Port P11 Port P12Port P14
Port P13
(3)
<VCC2 ports>(4) <VCC1 ports>(4)
<VCC1 ports>(4)
<VCC2 ports>(4)<VCC1 ports>(4)
(3) (3)
(3)