Datasheet
15. A/D Converter
puorG92/C61M
page 231
854fo7002,03.raM21.1.veR
2110-1010B90JER
Figure 15.9 ADCON0 to ADCON2 Registers in Repeat Mode
A/D Control Register 0 
(1)
Symbol Address  After Reset  
ADCON0 03D6
16
 00000XXX
2
b7 b6 b5 b4 b3 b2 b1 b0
Analog input pin select 
bit
(2, 3)
CH0
Bit Symbol Bit Name Function
CH1
CH2
A/D operation mode 
select bit 0 
(3)
MD0
MD1
Trigger select bit
0: Software trigger
1: Hardware trigger (AD
TRG trigger)
TRG
ADST A/D conversion start flag
0: A/D conversion disabled
1: A/D conversion started
Frequency select bit 0
See Table 15.2  
CKS0
RW
RW
RW
RW
RW
RW
RW
RW
RW
A/D Control Register 1 
(1)
Symbol  Address  After Reset   
ADCON1 03D7
16
 00
16
Bit Name Function
Bit Symbol
b7 b6 b5 b4 b3 b2 b1 b0
A/D sweep pin select bit
SCAN0
SCAN1
MD2
BITS 8/10-bit mode select bit
0: 8-bit mode
1: 10-bit mode
VCUT
A/D operation mode 
select bit 1 
0: Other than repeat sweep mode 1
1: Vref connected
Frequency select bit 1CKS1
RW
RW
RW
RW
RW
RW
RW
Invalid in repeat mode
See Table 15.2 
Nothing is assigned. If necessary, set to 0.
When read, the content is 0
(b7-b6)
NOTES: 
1. If the ADCON1 register is rewritten during A/D conversion, the conversion result will be undefined. 
2. If the VCUT bit is reset from 0 (Vref unconnected) to 1 (Vref connected), wait for 1 ยตs or more before starting A/D 
conversion.
Vref connect bit 
(2)
0
A/D Control Register 2
(1)
Symbol  Address  After Reset   
ADCON2 03D4
16
00
16
Bit Name FunctionBit Symbol
b7 b6 b5 b4 b3 b2 b1 b0
A/D conversion method 
select bit
SMP
Reserved bit Set to 0
TRG1
A/D input group select bit 
b2 b1
0 0: Select port P10 group 
0 1: Select port P9 group
1 0: Select port P0 group
1 1: Select port P1/P9 group 
Set to 0 in one-shot mode
Frequency select bit 2CKS2
RW
RW
RW
RW
RW
RW
RW
0: Without sample and hold
1: With sample and hold
See Table 15.2 
Nothing is assigned. If necessary, set to 0.
When read, the content is 0
(b7-b6)
NOTE: 
 1. If the ADCON2 register is rewritten during A/D conversion, the conversion result will be undefined.
Trigger select bit
ADGSEL0
ADGSEL1
(b3)
10
00
b2 b1 b0
0 0 0: Select AN
0
0 0 1: Select AN
1
0 1 0: Select AN
2
0 1 1: Select AN
3
1 0 0: Select AN
4
1 0 1: Select AN
5
1 1 0: Select AN
6
1 1 1: Select AN
7
b4 b3
0 1: Repeat mode
NOTES: 
1. If the ADCON0 register is rewritten during A/D conversion, the conversion result will be undefined. 
2. AN0
0
 to AN0
7
, AN2
0
 to AN2
7
, and AN3
0
 to AN3
2
 can be used in the same way as AN
0
 to AN
7
. Use bits ADGSEL1 
and ADGSEL 0 in the ADCON2 register to select the desired pin. 
3. After rewriting bits MD1 and MD0, set bits CH2 to CH0 over again using an another instruction.
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