Datasheet

REVISION HISTORY M16C/29 Hardware Manual
Rev. Date Description
Page Summary
C-14
9 • Tables 1.6 to 1.8 Product Codes modified
19, 20 • Table 1.14 Pin Description pin description on I/O ports modified
Reset
37 • Figure 5.2 Reset Sequence Vcc and ROC timings modified
Processor Mode
45 • Figure 6.2 PM2 Register Description on notes 5 and 6 modified
Clock Generation Circuit
52 • Figure 7.6 PM2 Register Description on notes 5 and 6 modified
64 • Figure 7.12 State Transition in Normal Mode note 2 modified
Protection
69 • Description on protection modified
• Figure 8.1 PRCR Register note 1 modified
Interrupts
88 • Table 9.6 PC Value Saved in Stack Area When Address Match Interrupt
Request I Acknowledged instruction modified
Watchdog Timer
90 • Figure10.2 WDTS Register modified
• 10.1 Count Source Protective Mode description modified
Timer
129 • Figure 12.28 ICTB2 Register modified
Multi-Master I
2
C bus Interface
256 • Figure 16.1 Block Diagram of Multi-Master I
2
C bus Interface modified
Flash Memory Version
335 • 20.3.1 ROM Code Protect Function register name modified
340 • 20.5.2 Flash Memory Control Register 1 description on FMR17 bit modified
341 • Figure 20.6 FMR1 Register note 2 modified
343 • Figure 20.9 Setting and Resetting of EW Mode 1 modified
Electrical Characteristics
369 • Table 21.5 Flash Memory Version Electrical Characteristics note 10 modi-
fied
370 • Timing figure for td(P-R) and td(ROC) modified
372 • Table 21.9 Electrical Characteristics parameter and measurement condition
modified, note 5 deleted
380 • Table 21.25 Electrical Characteristics measurement condition modified, note
5 deleted
390 • Tables 21.43 and 44 Flash Memory Version Electrical Characteristics note
10 modified
391 • Timing figure for td(P-R) and td(ROC) modified
393 • Table 21.47 Electrical Characteristics parameter and condition modified, note