Datasheet

REVISION HISTORY M16C/29 Hardware Manual
Rev. Date Description
Page Summary
C-8
note 1 is added
160 Figure 13.21 Prescaler Function and Gate Function Note 1 modified
166
Table 13.10 SR Waveform Output Mode Specifications Specification modified
167 Figure 13.24 Set/Reset Waveform Output Mode Description for (1) Free-run-
ning operation modified, register names modified
168 Table 13.11 Pin Setting for Time Measurement and Waveform Generating
Functions Description of port direction modified
Serial I/O
170 Note is modified
171 Figure 14.1 Block Diagram of UARTi (i = 0 to 2) PLL clock is added to the
upper portion of diagram
174 Figure 14.4 U0TB to U2TB, U0RB to U2RB, U0BRG to U2BRG Registers
Note 2 is modified, note 3 is newly added
175 Figure 14.5 U0MR Register, U1MR Register Bit map is modified
176 Figure 14.6 U0C0 Register Note 3 modified, Note 4 to 7 are added
Figure 14.6 U2C0 Register Note 2 is added
177 Figure 14.7 PACR Register added
180 Table 14.1 Clock Synchronous Serial I/O Mode Specifications Select func-
tion modified, note 2 modified
182 Table 14.3 Pin Functions Note 1 added
Table 14.4 P64 Pin Functions Note 1 added
183 Figure 14.10 Typical transmit/receive timings in clock synchronous serial I/
O mode Example of receive timing: figure modified
184 14.1.1.1 Counter Measre for Communication Error Occurs newly added
185 14.1.1.2 CLK Polarity Select Function Newly added
186 Figure 14.14 Transfer Clock Output From Multiple Pins Note 2 added
187
_______ _______
14.1.1.7 CTS/RTS separate function (UART0) modified
Figure 14.15 CTS/RTS Separate Function Usage Note 1 added
188 Table 14.5 UART Mode Specifications Select function modified, note 1 modi-
fied
190 Table 14.7 I/O Pin Functions in UART Mode Note 1 added
Table 14.8 P64 Pin Functions in UART Mode Note 2 added
192
________
Figure 14.17 Receive Operation RTSi line is modified
14.1.2.1 Bit Rates newly added
Table 14.9 Example of Bit Rates and Settings newly added
193 14.1.2.2 Counter Measure for Communication Error newly added
195 14.1.2.6 CTS/RTS Separate Function (UART0) P70 pin is added
Figure 14.21 CTS/RTS Separate Function Note 1 added
196 Table 14.10 I
2
C mode Specifications Note 2 modified