Datasheet

19. Programmable I/O Ports
puorG92/C61M
page 328
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Figure 19.12 Functioning of Digital Debounce Filter
f8
P17
Data Bus
1. (Condition after reset). P17DDR=FF
16. Pin input signal will be output directly.
2. Set the P17DDR register to 03
16. The P17DDR register starts decrement along the f8 as a counter source, if the pin
input level (e.g.,"L") and the signal output level (e.g.,"H") are not matched.
3. The P17DDR register will stops counting when the pin input level and the signal output level are matched (e.g.,
both levels are "H") while counting.
4. If the pin input level (e.g.,"L") and the signal output level (e.g.,"H") are not matched the P17DDR register will start
decrement again after the setting value is reloaded.
5. When the P17DDR register is underflow, it stops counting and the signal output will output the same as pin input
level (e.g."L").
6. If the pin input level (e.g.,"H") and the signal output level (e.g., "L") are not matched again, the P17DDR register will
start decrement again after the setting value is reloaded.
7. When the P17DDR register is underflow, it stops counting and the signal output will output the same as pin input
level (e.g."H").
8. If the pin input level (e.g.,"H") and the signal output level (e.g., "L") are not matched again, the P17DDR register will
start decrement again after the setting value is reloaded.
9. Set the P17DDR register to FF
16. The P17DDR register starts counting after the setting value is reloaded. Pin input
signal will be output directly.
Clock
Port In
Reload Value
(write)
Digital Debounce Filter
Signal Out
Count Value
(read)
To INT5
Data Bus
f
8
Reload Value
Port In
Signal Out
Count Value
Reload Value
(continued)
Port In
(continued)
Signal Out
(continued)
Count Value
(continued)
FF
03
FF
03
02 01
03
02 01
00
FF
03
FF
03
02
01
00
FF
FF
03
02
FF
1 2
3
4
5
6
7
8
9
• Example of INT5 Digital Debounce Function (if P17DDR = 0316)