Datasheet

19. Programmable I/O Ports
puorG92/C61M
page 326
854fo7002,03.raM21.1.veR
2110-1010B90JER
Figure 19.9 PCR Register
Figure 19.10 PACR Register
Pin Assignment Control Register
(1)
Symbpl Address After Reset
PACR 025D
16 00 16
Bit Name FunctionBit Symbol
RW
b7 b6 b5 b4 b3 b2 b1 b0
Pin enabling bit
Nothing is assigned. If necessary,
set to 0. When read, the
content is 0
RW
(b6-b3)
010 : 64 pin
011 : 80 pin
All other values are reserved. Do
not use.
PACR0
PACR1
PACR2
RW
RW
Reserved bits
U1MAP
UART1 pin remapping bit
UART1 pins assigned to
0 : P6
7 to P6 4
1 : P7 3 to P7 0
RW
NOTE:
1. Set the PACR register by the next instruction after setting the PRC2 bit in the PRCR register to 1 (write
enable).
Port Control Register
Symbpl Address After Reset
PCR 03FF
16 0016
Bit Name FunctionBit symbol
RW
b7 b6 b5 b4 b3 b2 b1 b0
PCR0 Port P1 control bit
RW
(b7-b1)
Operation performed when the P1
register is read
0: When the port is set for input,
the input levels of P1 0 to P1 7
pins are read. When set for
output, the port latch is read.
1: The port latch is read
regardless of whether the port
is set for input or output.
Nothing is assigned. If necessary, set to 0.
When read, the content is 0