Datasheet

19. Programmable I/O Ports
puorG92/C61M
page 320
854fo7002,03.raM21.1.veR
2110-1010B90JER
Figure 19.3 I/O Ports (3)
P8
5
P6
3
, P6
7
Output
“1
Data bus
Pull-up selection
Direction register
Port latch
Switching between CMOS and Nch
NOTE:
1. symbolizes a parasitic diode.
Make sure the input voltage on each port will not exceed Vcc.
Data bus
Pull-up selection
Direction register
Port latch
NMI Interrupt Input
NMI Enable
Digital Debounce
NMI Enable
SD
(1)
(1
)
Data bus
Direction register
Pull-up selection
Port latch
Analog input
Input to respective peripheral functions
P9
1
, P9
2
, P9
7
,
P10
4
to P10
7
(1)