Datasheet

1. Overview
page 11
62fo6002,52.luJ15.0.veR
1500-1700B30JER
)T62/C61M,B62/C61M,A62/C61M(puorGA62/C61M
24
1
2
3
4
5
6
7
8
9
10
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12
13
14
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19
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36
35
34
33
32
31
30
29
28
27
26
25
48
47
46
45
44
43
42
41
40
39
38
37
P9
2
/TB2
IN
/AN
32
P9
1
/TB1
IN
/AN
31
CNV
SS
P1
7
/INT
5
/IDU
P1
6
/INT
4
/IDW
P1
5
/INT
3
/AD
TRG
/IDV
P107/AN7/KI3
P7
0
/TxD
2
/TA
0OUT
/SDA
2
/CTS
1
/RTS
1
/CTS
0
/CLKS
1
X
OUT
V
SS
X
IN
P8
5
/NMI/SD
V
CC
P6
7
/TxD
1
P6
6
/RxD
1
P6
5
/CLK
1
RESET
P71/RxD2/TA0IN/SCL2/CLK1
P72/CLK2/TA1OUT/V/RxD1
P73/CTS2/RTS2/TA1IN/V/TxD1
P74/TA2OUT/W
P75/TA2IN/W
P76/TA3OUT
P77/TA3IN
P80/TA4OUT/U
P8
1/TA4IN/U
P8
2/INT0
P83/INT1
P6
4
/CTS
1
/RTS
1
/CTS
0
/CLKS
1
P6
3
/TxD
0
P6
2
/RxD
0
P6
1
/CLK
0
P6
0
/CTS
0
/RTS
0
P9
0
/TB0
IN
/AN
30
/CLK
OUT
P8
7
/X
CIN
P8
6
/X
COUT
P106/AN6/KI2
P105/AN5/KI1
P104/AN4/KI0
P103/AN3
P102/AN2
P101/AN1
AVss
P100/AN0
VREF
AVcc
P93/AN24
P84/INT2/ZP
Note. Set PACR2 to PACR0 bit in the PACR register
to "100
2 " before you input and output it after
resetting to each pin. When the PACR register
isn't set up, the input and output function of
some of the
p
ins are disabled.
Package: PLQP0048KB-A (48P6Q)
1.5 Pin Assignments
Figures 1.6 and 1.7 show the Pin Assignments (top view).
Figure 1.6 Pin Assignment for 48-Pin Package (Top View)