Datasheet

7. Clock Generation Circuit
page 59
923fo7002,51.beF00.2.veR
0020-2020B90JER
)T62/C61M,B62/C61M,A62/C61M(puorGA62/C61M
7.8.3 How to Use Oscillation Stop and Re-oscillation Detect Function
• The oscillation stop and re-oscillation detect interrupt shares the vector with the watchdog timer inter-
rupt. If the oscillation stop, re-oscillation detection and watchdog timer interrupts both are used, read
the CM22 bit in an interrupt routine to determine which interrupt source is requesting the interrupt.
• Where the main clock re-oscillated after oscillation stop, return the main clock to the CPU clock and
peripheral function clock source in the program. Figure 7.8.3.1 shows the procedure for switching the
clock source from the on-chip oscillator to the main clock.
• Simultaneously with oscillation stop, re-oscillation detection interrupt occurrence, the CM22 bit be-
comes “1”. When the CM22 bit is set at “1”, oscillation stop, re-oscillation detection interrupt are dis-
abled. By setting the CM22 bit to “0” in the program, oscillation stop, re-oscillation detection interrupt
are enabled.
• If the main clock stops during low speed mode where the CM20 bit is “1”, an oscillation stop, re-oscilla-
tion detection interrupt request is generated. At the same time, the on-chip oscillator starts oscillating.
In this case, although the CPU clock is derived from the sub clock as it was before the interrupt oc-
curred, the peripheral function clocks now are derived from the on-chip oscillator clock.
• To enter wait mode while using the oscillation stop, re-oscillation detection function, set the CM02 bit to
“0” (peripheral function clocks not turned off during wait mode).
• Since the oscillation stop, re-oscillation detection function is provided in preparation for main clock stop
due to external factors, set the CM20 bit to “0” (Oscillation stop, re-oscillation detection function dis-
abled) where the main clock is stopped or oscillated in the program, that is where the stop mode is
selected or the CM05 bit is altered.
• This function cannot be used if the main clock frequency is 2 MHz or less. In that case, set the CM20 bit
to “0”.
Figure 7.8.3.1. Procedure to Switch Clock Source From On-chip Oscillator to Main Clock
Switch to the main clock
Determine several times whether
the CM23 bit is set to 0
(main clock oscillates)
Set the CM22 bit to 0
("oscillatin stop, re-oscillation" not detected)
Set the CM06 bit to 1
(divide-by-8 mode)
Set the CM21 bit to 0
(main clock or PLL clock)
CM06: Bit in the CM0 register
CM23 to CM21: Bits in the CM2 register
Yes
No
End
NOTE:
1. If the clock source for CPU clock is to be changed to PLL clock, set to PLL operation
mode after set to high-speed mode.