Datasheet

7. Clock Generation Circuit
page 38
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7. Clock Generation Circuit
The clock generation circuit contains four oscillator circuits as follows:
(1) Main clock oscillation circuit
(2) Sub clock oscillation circuit
(3) On-chip oscillator (available at reset, oscillation stop detect function)
(4) PLL frequency synthesizer
Table 7.1 lists the clock generation circuit specifications. Figure 7.1 shows the clock generation circuit.
Figures 7.2 to 7.6 show the clock-related registers.
Table 7.1. Clock Generation Circuit Specifications
• CPU clock source
• Peripheral function
clock source
Use of clock
Main clock
oscillation circuit
Sub clock
oscillation circuit
Item
• CPU clock source
• Timer A, B's clock
source
Clock frequency 0 to 20 MHz 32.768 kHz
• Ceramic oscillator
• Crystal oscillator
Usable oscillator
• Crystal oscillator
X
IN, XOUT
Pins to connect
oscillator
X
CIN, XCOUT
Available
Oscillation stop,
restart function
Available
Oscillating ( )
Oscillator status
after reset
Stopped
Externally derived clock can be inputOther
PLL frequency
synthesize
r
Available
Stopped
On-chip oscillator
• CPU clock source
• Peripheral function clock source
• CPU and peripheral function
clock sources when the main
clock stops oscillating
• Selectable source frequency:
f
1(ROC), f2(ROC), f3(ROC)
• Selectable divider:
by 2, by 4, by 8
Available
Oscillating
• CPU clock source
• Peripheral function clock
sourc
e
(CPU clock source)
M16C/26A
M16C/26B
Stopped(M16C/26T)
10 to 20 MHz ( )
10 to 24 MHz (M16C/26B)
M16C/26A
M16C/26T