Datasheet

5. Reset
page 27
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0020-2020B90JER
)T62/C61M,B62/C61M,A62/C61M(puorGA62/C61M
5.2 Software Reset
When the PM03 bit in the PM0 register is set to “1” (microcomputer reset), the microcomputer has its pins,
CPU, and SFR initialized. Then the program is executed starting from the address indicated by the reset
vector.
The device will reset using on-chip oscillator as the CPU clock.
At software reset, some SFR’s are not initialized. Refer to “SFR”.
5.3 Watchdog Timer Reset
When the PM12 bit in the PM1 register is “1” (reset when watchdog timer underflows), the microcomputer
initializes its pins, CPU and SFR if the watchdog timer underflows.
The device will reset using on-chip oscillator as the system clock. Then the program is executed starting
from the address indicated by the reset vector.
At watchdog timer reset, some SFR’s are not initialized. Refer to “SFR”.
5.4 Oscillation Stop Detection Reset
When the CM20 bit in the CM2 register is set to “1”(oscillation stop, re-oscillation detection function
enabled) and the CM27 bit is set to “0” (reset at oscillation stop detection), the microcomputer initializes
its pins, CPU and SFR, coming to a halt if it detects main clock oscillation circuit stop. Refer to the section
“oscillation stop, re-oscillation detection function”.
At oscillation stop detection reset, some SFR’s are not initialized. Refer to the section “SFR”.
Figure 5.1.1.1. Example Reset Circuit
RESET
V CC
RESET
V CC
0V
0V
More than td(ROC) + td(P-R)
Equal to or less
than 0.2V
CC
Equal to or less
than 0.2V
CC
Recommended
operating
voltage