Datasheet
Table Of Contents
- Notes regarding these materials
- General Precautions in the Handling of MPU/MCU Products
- How to Use This Manual
- Table of Contents
- Quick Reference by Address B-
- 1. Overview
- 2. Central Processing Unit (CPU)
- 2.1 Data Registers (R0, R1, R2 and R3)
- 2.2 Address Registers (A0 and A1)
- 2.3 Frame Base Register (FB)
- 2.4 Interrupt Table Register (INTB)
- 2.5 Program Counter (PC)
- 2.6 User Stack Pointer (USP) and Interrupt Stack Pointer (ISP)
- 2.7 Static Base Register (SB)
- 2.8 Flag Register (FLG)
- 2.8.1 Carry Flag (C Flag)
- 2.8.2 Debug Flag (D Flag)
- 2.8.3 Zero Flag (Z Flag)
- 2.8.4 Sign Flag (S Flag)
- 2.8.5 Register Bank Select Flag (B Flag)
- 2.8.6 Overflow Flag (O Flag)
- 2.8.7 Interrupt Enable Flag (I Flag)
- 2.8.8 Stack Pointer Select Flag (U Flag)
- 2.8.9 Processor Interrupt Priority Level (IPL)
- 2.8.10 Reserved Area
- 3. Memory
- 4. Special Function Registers (SFRs)
- 5. Reset
- 6. Processor Mode
- 7. Clock Generation Circuit
- 8. Protection
- 9. Interrupt
- 10. Watchdog Timer
- 11. DMAC
- 12. Timer
- 13. Serial I/O
- 14. A/D Converter
- 15. CRC Calculation Circuit
- 16. Programmable I/O Ports
- 16.1 Port Pi Direction Register (PDi Register, i = 1, 6 to 10)
- 16.2 Port Pi Register (Pi Register, i = 1, 6 to 10)
- 16.3 Pull-up Control Register 0 to Pull-up Control Register 2 (PUR0 to PUR2 Registers)
- 16.4 Port Control Register
- 16.5 Pin Assignment Control register (PACR)
- 16.6 Digital Debounce function
- 17. Flash Memory Version
- 17.1 Flash Memory Performance
- 17.2 Memory Map
- 17.3 Functions To Prevent Flash Memory from Rewriting
- 17.4 CPU Rewrite Mode
- 17.5 Register Description
- 17.6 Precautions in CPU Rewrite Mode
- 17.6.1 Operation Speed
- 17.6.2 Prohibited Instructions
- 17.6.3 Interrupts
- 17.6.4 How to Access
- 17.6.5 Writing in the User ROM Space
- 17.6.6 DMA Transfer
- 17.6.7 Writing Command and Data
- 17.6.8 Wait Mode
- 17.6.9 Stop Mode
- 17.6.10 Low Power Consumption Mode and On-chip Oscillator-Low Power Consumption Mode
- 17.7 Software Commands
- 17.8 Status Register
- 17.9 Standard Serial I/O Mode
- 17.10 Parallel I/O Mode
- 18. Electrical Characteristics
- 19. Usage Notes
- 19.1 SFR
- 19.2 PLL Frequency Synthesizer
- 19.3 Power Control
- 19.4 Protect
- 19.5 Interrupts
- 19.6 DMAC
- 19.7 Timer
- 19.8 Serial I/O
- 19.9 A/D Converter
- 19.10 Programmable I/O Ports
- 19.11 Electric Characteristic Differences Between Mask ROM
- 19.12 Mask ROM Version
- 19.13 Flash Memory Version
- 19.13.1 Functions to Inhibit Rewriting Flash Memory
- 19.13.2 Stop mode
- 19.13.3 Wait mode
- 19.13.4 Low power dissipation mode, on-chip oscillator low power dissipation mode
- 19.13.5 Writing command and data
- 19.13.6 Program Command
- 19.13.7 Operation speed
- 19.13.8 Instructions prohibited in EW0 Mode
- 19.13.9 Interrupts
- 19.13.10 How to access
- 19.13.11 Writing in the user ROM area
- 19.13.12 DMA transfer
- 19.13.13 Regarding Programming/Erasure Times and Execution Time
- 19.13.14 Definition of Programming/Erasure Times
- 19.13.15 Flash Memory Version Electrical Characteristics 10,000 E/W cycle product
- 19.13.16 Boot Mode
- 19.14 Noise
- 19.15 Instruction for a Device Use
- Appendix 1. Package Dimensions
- Appendix 2. Functional Difference
- Register Index
- REVISION HISTORY

1. Overview
page 15
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0020-2020B90JER
)T62/C61M,B62/C61M,A62/C61M(puorGA62/C61M
1.6 Pin Description
Apply 0V to the Vss pin. Apply following voltage to the Vcc pin.
2.7 to 5.5 V (M16C/26A, M16C/26B), 3.0 to 5.5 V (M16C/26T T-ver.), 4.2
to 5.5 V (M16C/26T V-ver.)
Supplies power to the A/D converter. Connect the AVCC pin to VCC and
the AVSS pin to VSS
___________
The MCU is in a reset state when "L" is applied to the RESET pin
Connect the CNVSS pin to VSS
I/O pins for the main clock oscillation circuit. Connect a ceramic resonator
or crystal oscillator between X
IN and XOUT. To apply external clock, apply
it to XIN and leave XOUT open. If XIN is not used (for external oscillator or
external clock), connect XIN pin to VCC and leave XOUT open
I/O pins for the sub clock oscillation circuit. Connect a crystal oscillator
between XCIN and XCOUT
Outputs the clock having the same frequency as f1, f8, f32, or fC
______ ________
Input pins for the INT interrupt. INT2 can be used for Timer A Z-phase
function
_______ _______
NMI
interrupt input pin.
NMI
cannot be used as I/O port while the three-phase
_______
motor control is enabled. Apply a stable "H" to NMI after setting it's direction
register to "0" when the three-phase motor control is enabled
Input pins for the key input interrupt
I/O pins for the timer A0 to A4
Input pins for the timer A0 to A4
Input pin for Z-phase
Timer B0 to B1 input pins
Output pins for the three-phase motor control timer
I/O pins for the three-phase motor control timer
Input pins to control data transmission
Output pins to control data reception
Inputs and outputs the transfer clock
Inputs serial data
Outputs serial data
Output pin for transfer clock
Applies reference voltage to the A/D converter
Analog input pins for the A/D converter
Input pin for an external A/D trigger
I/O ports for CMOS. Each port can be programmed for input or output
under the control of the direction register. An input port can be set, by
program, for a pull-up resistor available or for no pull-up resister available
in 3-bit units
CMOS I/O ports which have a direction register determines an individual
pin used as an input port or an output port. A pull-up resistor is selectable
for every 4 input ports
VCC, VSS
AVCC
AVSS
____________
RESET
CNVSS
XIN
XOUT
XCIN
XCOUT
CLKOUT
________ ________
INT0 to INT5
_______
NMI
_____ _____
KI0 to KI3
TA0OUT to
TA4OUT
TA0IN to
TA4IN
ZP
TB0
IN to
TB1IN
___ ___
U, U, V, V,
___
W, W
IDU, IDW,
_____
IDV, SD
_________ _________
CTS1 to CTS2
_________ _________
RTS1 to RTS2
CLK1 to CLK2
RxD1 to RxD2
TxD1 to TxD2
CLKS1
V
REF
AN0 to AN7
AN3
0
to AN3
1
___________
ADTRG
P15 to P17
P64 to P67
P70 to P77
P80 to P87
P10
0
to P10
7
P90 to P91
Power Supply
Analog Power
Supply
Reset Input
CNVSS
Main Clock
Input
Main Clock
Output
Sub Clock Input
Sub Clock Output
Clock Output
______
INT Interrupt
Input
_______
NMI Interrupt
Input
Key Input Interrupt
Timer A
Timer B
Three-Phase
Motor Control
Timer Output
Serial I/O
Reference
Voltage Input
A/D Converter
I/O Ports
I
I
I
I
I
O
I
O
O
I
I
I
I/O
I
I
I
O
I/O
I
O
I/O
I
O
O
I
I
I
I/O
I/O
I : Input O : Output I/O : Input and output
Classification Pin Name I/O Type Description
Table 1.13 Pin Description (48-Pin and 42-Pin Packages)