Datasheet

14. A/D Converter
page 209
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0020-2020B90JER
)T62/C61M,B62/C61M,A62/C61M(puorGA62/C61M
A/D control register 0
(1)
Symbol Address After reset
ADCON0 03D6 16 00000XXX 2
b7 b6 b5 b4 b3 b2 b1 b0
Analog Input Pin
Select Bit
CH0
Bit symbol Bit name Function
CH1
CH2
A/D Operation Mode
Select Bit
0
MD0
MD1
Trigger Select Bit Refer to Table 14.1.8.2 Trigger Select Bit
Setting in Delayed Trigger Mode 1
TRG
ADST
A/D Conversion Start
Flag
(2)
0 : A/D conversion disabled
1 : A/D conversion started
Frequency Select Bit 0CKS0
RW
A/D control register 1
(1)
Symbol Address After reset
ADCON1 03D7 16 00 16
Bit name FunctionBit symbol
b7 b6 b5 b4 b3 b2 b1 b0
A/D Sweep Pin
Select Bit
(2)
SCAN0
SCAN1
MD2
BITS
8/10-Bit Mode Select Bit 0 : 8-bit mode
1 : 10-bit mode
VCUT
V
REF Connect Bit (3)
A/D Operation Mode
Select Bit 1
1 : V
REF connected
01
When selecting delayed trigger mode 1
0
1 1 1 : Set to "111b" in delayed trigger
mode 1
b2 b1 b0
0 0 : One-shot mode or delayed trigger mode
0,1
b4 b3
1
Frequency Select Bit 1
CKS1
0 : Any mode other than repeat sweep
mode 1
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Refer to Table 14.2 A/D Conversion
Frequency Select
Refer to Table 14.2 A/D Conversion
Frequency Select
(b7-b6)
110
b1 b0
0 0: AN0 to AN1 (2 pins)
0 1: AN
0 to AN3 (4 pins)
1 0: AN
0 to AN5 (6 pins)
1 1: AN
0 to AN7 (8 pins)
Nothing is assigned. When write, set to “0”.
When read, its content is “0”.
0
NOTES:
1. If the ADCON0 register is rewritten during A/D conversion, the conversion result will be indeterminate.
2. Do not write “1” in delayed trigger mode 1. When write, set to "0".
NOTES:
1. If the ADCON1 register is rewritten during A/D conversion, the conversion result will be indeterminate.
2. AN
30 to AN32 can be used in the same way as AN0 to AN7. Use the ADGSEL1 to ADGSET0 bits in the ADCON2
register to select the desired pin.
3. If the VCUT bit is reset from “0” (V
REF unconnected) to “1” (VREF connected), wait for 1 µs or more before starting A/D
conversion.
A/D control register 2
(1)
Symbol Address After reset
ADCON2 03D416 0016
b7 b6 b5 b4 b3 b2 b1 b0
A/D Conversion Method
Select Bit
(2)
1 : With sample and hold
Bit symbol Bit name Function RW
SMP
Reserved Bit
Set to
“0”
0
A/D Input Group
Select Bi
t
0 0 : Select port P10 group (AN
i)
0 1 : Select port P9 group (AN
3i)
1 0 : Do not set
1 1 : Do not set
b2 b1
Frequency Select Bit 2
CKS2
ADGSEL0
ADGSEL1
RW
RW
RW
RW
RW
(b3)
Nothing is assigned. When write, set to “0”.
When read, its content is “0”.
(b7-b6)
Refer to Table 14.2 A/D Conversion
Frequency Select
RW
TRG1
Trigger Select Bit 1
1
Refer to Table 14.1.8.2 Trigger Select Bit
Setting in Delayed Trigger Mode 1
1
NOTES:
1. If the ADCON2 register is rewritten during A/D conversion, the conversion result will be indeterminate.
2. Set to “1” in delayed trigger mode 1.
Figure 14.1.8.4 ADCON0 to ADCON2 Registers in Delayed Trigger Mode 1