Datasheet
Table Of Contents
- Notes regarding these materials
- General Precautions in the Handling of MPU/MCU Products
- How to Use This Manual
- Table of Contents
- Quick Reference by Address B-
- 1. Overview
- 2. Central Processing Unit (CPU)
- 2.1 Data Registers (R0, R1, R2 and R3)
- 2.2 Address Registers (A0 and A1)
- 2.3 Frame Base Register (FB)
- 2.4 Interrupt Table Register (INTB)
- 2.5 Program Counter (PC)
- 2.6 User Stack Pointer (USP) and Interrupt Stack Pointer (ISP)
- 2.7 Static Base Register (SB)
- 2.8 Flag Register (FLG)
- 2.8.1 Carry Flag (C Flag)
- 2.8.2 Debug Flag (D Flag)
- 2.8.3 Zero Flag (Z Flag)
- 2.8.4 Sign Flag (S Flag)
- 2.8.5 Register Bank Select Flag (B Flag)
- 2.8.6 Overflow Flag (O Flag)
- 2.8.7 Interrupt Enable Flag (I Flag)
- 2.8.8 Stack Pointer Select Flag (U Flag)
- 2.8.9 Processor Interrupt Priority Level (IPL)
- 2.8.10 Reserved Area
- 3. Memory
- 4. Special Function Registers (SFRs)
- 5. Reset
- 6. Processor Mode
- 7. Clock Generation Circuit
- 8. Protection
- 9. Interrupt
- 10. Watchdog Timer
- 11. DMAC
- 12. Timer
- 13. Serial I/O
- 14. A/D Converter
- 15. CRC Calculation Circuit
- 16. Programmable I/O Ports
- 16.1 Port Pi Direction Register (PDi Register, i = 1, 6 to 10)
- 16.2 Port Pi Register (Pi Register, i = 1, 6 to 10)
- 16.3 Pull-up Control Register 0 to Pull-up Control Register 2 (PUR0 to PUR2 Registers)
- 16.4 Port Control Register
- 16.5 Pin Assignment Control register (PACR)
- 16.6 Digital Debounce function
- 17. Flash Memory Version
- 17.1 Flash Memory Performance
- 17.2 Memory Map
- 17.3 Functions To Prevent Flash Memory from Rewriting
- 17.4 CPU Rewrite Mode
- 17.5 Register Description
- 17.6 Precautions in CPU Rewrite Mode
- 17.6.1 Operation Speed
- 17.6.2 Prohibited Instructions
- 17.6.3 Interrupts
- 17.6.4 How to Access
- 17.6.5 Writing in the User ROM Space
- 17.6.6 DMA Transfer
- 17.6.7 Writing Command and Data
- 17.6.8 Wait Mode
- 17.6.9 Stop Mode
- 17.6.10 Low Power Consumption Mode and On-chip Oscillator-Low Power Consumption Mode
- 17.7 Software Commands
- 17.8 Status Register
- 17.9 Standard Serial I/O Mode
- 17.10 Parallel I/O Mode
- 18. Electrical Characteristics
- 19. Usage Notes
- 19.1 SFR
- 19.2 PLL Frequency Synthesizer
- 19.3 Power Control
- 19.4 Protect
- 19.5 Interrupts
- 19.6 DMAC
- 19.7 Timer
- 19.8 Serial I/O
- 19.9 A/D Converter
- 19.10 Programmable I/O Ports
- 19.11 Electric Characteristic Differences Between Mask ROM
- 19.12 Mask ROM Version
- 19.13 Flash Memory Version
- 19.13.1 Functions to Inhibit Rewriting Flash Memory
- 19.13.2 Stop mode
- 19.13.3 Wait mode
- 19.13.4 Low power dissipation mode, on-chip oscillator low power dissipation mode
- 19.13.5 Writing command and data
- 19.13.6 Program Command
- 19.13.7 Operation speed
- 19.13.8 Instructions prohibited in EW0 Mode
- 19.13.9 Interrupts
- 19.13.10 How to access
- 19.13.11 Writing in the user ROM area
- 19.13.12 DMA transfer
- 19.13.13 Regarding Programming/Erasure Times and Execution Time
- 19.13.14 Definition of Programming/Erasure Times
- 19.13.15 Flash Memory Version Electrical Characteristics 10,000 E/W cycle product
- 19.13.16 Boot Mode
- 19.14 Noise
- 19.15 Instruction for a Device Use
- Appendix 1. Package Dimensions
- Appendix 2. Functional Difference
- Register Index
- REVISION HISTORY

14. A/D Converter
page 199
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Item Specification
Function The SCAN1 to SCAN0 bits in the ADCON1 register and ADGSEL1 to ADGSEL0 bits in
the ADCON2 register select pins. Analog voltage applied to the input voltage of the
selected pins are converted one-by-one to the digital code. At this time, Timer B0 under
flow generation starts AN
0 pin conversion. Timer B1 underflow generation starts con
version after the AN1 pin.
(1)
A/D Conversion Start
AN0 pin conversion start condition
•When Timer B0 underflow is generated if Timer B0 underflow is generated again
before Timer B1 underflow is generated , the conversion is not affected
•When Timer B0 underflow is generated during A/D conversion of pins after the AN
1
pin, conversion is halted and the sweep is restarted from AN0 pin
AN
1 pin conversion start condition
•When Timer B1 underflow is generated during A/D conversion of the AN
0 pin, the
input voltage of the AN
1 pin is sampled. The AN1 conversion and the rest of the
sweep start when AN0 conversion is completed.
A/D Conversion Stop
•When single sweep conversion from the AN0 pin is completed
Condition
•Set the ADST bit to "0" (A/D conversion halted)
(2)
Interrupt Request A/D conversion completed
Generation Timing
Analog Input Pin Select from AN0 to AN1 (2 pins), AN0 to AN3 (4 pins), AN0 to AN5 (6 pins) and
AN0 to AN7 (8 pins)
(3)
Readout of A/D Conversion Result
Readout one of the AN0 to AN7 registers that corresponds to the selected pins
NOTES:
1. Set the larger value than the value of the timer B0 register to the timer B1 register.
2. Do not write “1” (A/D conversion started) to the ADST bit in delayed trigger mode 0. When write “1”, unexpected
interrupts may be generated.
3. AN30 to AN32 can be used in the same way as AN0 to AN7. However, all input pins need to belong to the same
group.
14.1.7 Delayed Trigger Mode 0
In delayed trigger mode 0, analog voltages applied to the selected pins are converted one-by-one to a
digital code. The delayed trigger mode 0 used in combination with A/D trigger mode of Timer B. The
Timer B0 underflow starts a single sweep conversion. After completing the AN0 pin conversion, the AN1
pin is not sampled and converted until the Timer B1 underflow is generated. When the Timer B1 under-
flow is generated, the single sweep conversion is restarted with the AN1 pin. Table 14.1.7.1 shows the
delayed trigger mode 0 specifications. Figure 14.1.7.1 shows the operation example in delayed trigger
mode 0. Figure 14.1.7.2 and Figure 14.1.7.3 show each flag operation in the ADSTAT0 register that
corresponds to the operation example. Figure 14.1.7.4 shows the ADCON0 to ADCON2 registers in
delayed trigger mode 0. Figure 14.1.7.5 shows the ADTRGCON register in delayed trigger mode 0 and
Table 14.1.7.2 shows the trigger select bit setting in delayed trigger mode 0.
Table 14.1.7.1 Delayed Trigger Mode 0 Specifications